3 bit output

[Jaiko007]

Hello,

I need to design 3 bit output, which are 000, 001, 010, 011, 100 using 
FPGA. I'm using VHDL language. I have already designed it. But, the problem is I can't get that 
desired output I want. I got 000, 001, 011 and 111 outputs. Here I 
attach my code and testbench and also Isim simulator waveform part.

Thank you.

selectsig.vhd

selectsig_tb.vhd

simulator.wcfg

[artvvb]

Hello Jaiko007,

It looks like your testbench has some issues. The stim_proc you are using turns on s0, then s1, then s2, so the expected series of inputs for {s2, s1, s0} would be 000 -> 001 -> 011 -> 111. I assume that you'd like to test your logic with the sequence 000 -> 001 -> 010 -> 011 -> ... As in a three bit counter. The important thing to remember here is that your code will only do what you tell it to, so your signals will not go back to zero unless your sig_proc explicitly tells them to. The first few input vectors would need to look something like the following:

        wait for 20 ns;
        s0 <= '1';
        s1 <= '0';
        s2 <= '0';
        wait for 20 ns;
        s0 <= '0'; -- This!
        s1 <= '1';
        s2 <= '0';

-- [...]
        wait for 20 ns;
        s0 <= '0';
        s1 <= '0';
        s2 <= '1';

-- etc.

Setting s2 to zero in all three of these vectors is technically unnecessary, but makes the code more readable.

Thanks,

Arthur

[hamster]

Hi,

Also, rather than assigning "---" or "XXX" when an unknown switch setting is selected, why not just assign a constant value.

Assigning "don't care" or "unknown" all seems a bit none-deterministic me, and open to simulation/implementation mismatches - and those sort of bugs really hurt when they bite.

Mike