nexys4 board speed grade

[Theodore]

Hi all,

I am using the NEXYS4 board. I have found online the speed grade of the chip on board is -1. When I use this speed grade to do the simulation on vivado, it gives different time results from what I have measured. I am just wondering if DIGILENT uses different speed grade xc7a100tcsg chips for different NEXYS4. 

Thanks in advance!

Theodore

[hamster]

In what way 'different'? What aspect of the device's performance are you measuring?

In most cases a speed grade is a guaranteed minimum performance over the entire operating range (voltage, temperature, etc), so you should expect most aspects of the average -1 part to perform a little better than the timings in the datasheet when operating in a friendly environment...

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[Theodore]

In what way 'different'? What aspect of the device's performance are you measuring?

In most cases a speed grade is a guaranteed minimum performance over the entire operating range (voltage, temperature, etc), so you should expect most aspects of the average -1 part to perform a little better than the timings in the datasheet when operating in a friendly environment...

.

Thanks for answering. Basically I am placing the ring oscillator (odd number of inverters connect from end to end) on the chip, the estimated frequency vivado gives with speed grade -1 (I add all estimated delay between stages and calculates the results) is only half of what I have measured and I have checked the both the measurement and the estimation several times and it should be correct. 

So I am wondering whether the speed grade might be different as it only writes xc7a100t-csg324 on the NEXYS4 box.

[hamster]

I've done the same thing, but in a Spartan-6, http://hamsterworks.co.nz/mediawiki/index.php/Ring_Oscillator IIRC it clocked out at about 25% quicker than timing indicated it should.

It might pay to to have a close look in the FPGA editor, to see if some of the gates in the ring haven't been optimized away. Alternative make the ring 2n+1 as large and see if the frequency halves. If not, the tools might be 'simplifying' the logic on you,..

[Theodore]

Thanks! my code is fine as I uses donttouch attribute in vhdl. I think it is just the problem of the the chip based on my searching online. They probably have this faster chip marked as a slower one.