Analog Shield DAC and ADC Offsets

[MohitVerma]

Hi there,

I've been using the Analog Shield with a UC32 for controlling and measuring different parameters in a physics experiment. I've noticed that for certain voltages, the DAC (and ADC) both have offsets on the order of 10 - 40 mV relative the value that they are being programmed to (or being feed to by a power supply). This offset seems to be random (in that it doesn't follow a specific trend), although it is consistent for the same ADC/ADC. I've also seen that the offset pattern is different for different DAC/ADCs on the same Analog Shield and I've also tested this on different Analog Shields and still seen this issue. This error seems to be much larger than the specified offset error for the DAC and ADC. 

Has anyone experienced similiar DAC/ADC offset issues with the Analog Shield? And has anyone developed any clever solutions/compensation libraries to deal with this to get more precise reading? 

[JColvin]

Hi @MohitVerma,

I personally haven't seen or heard of that high of offsets. Looking at the datasheets for the embedded DAC and ADC (link and link, respectively), it appears that the DAC can have an offset of around 6 mV inherently, though the offset for the ADC seems to only be about 76uV or lower, both of which are definitely lower than what you are measuring.

I'm not sure what you mean by:

Quote

the offset pattern is different for different DAC/ADCs on the same Analog Shield

Did you change out the chips themselves or are you referring to the different channels on the DAC/ADC?

Otherwise, the only other thing that I can think of at the moment (which I imagine you did) would be to make sure the grounds are all connected to help make sure you are getting good measurements. I have also noted that the resistor values for the DAC and ADC circuitry shown on the schematic from TI do not seem to quite match up what I have measured with a DMM (in terms of actual resistor values with their 5% variance or so; I'm not certain on the actual resistance variance), so that could definitely have an impact on the Vout and Vin calcuations (shown on page 2 and 4 of the schematic), though again I haven't seen quite this high of variance.

In terms of library adjustment (if it is the resistors), my understanding is that it would have to be custom done for each channel post reading and pre-writing to get the correct data, but that sounds like the opposite of fun.

Thanks,
JColvin

[MohitVerma]

I did find a post where someone seemed to report larger offsets here: 

 

We did not change out the chips, we just compared different channels on the same Analog Shield. Hm, it's possible that it could be the resistors but the offsets don't seem to follow any trend. I might try programming a digital multimeter with the DAC to calibrate and correct values to provide more accuracy. 

 

[JColvin]

Hi @MohitVerma,

Agreed; apparently I have seen an offset value around what you are seeing (in the 30 mV range as per the thread you found which I clearly didn't remember), so it is a bit unsettling that the variance is there among multiple boards, though unfortunately I don't have a better solution to offer than the calibration scheme. Hopefully it will be a linear correction to maintain minimal processing.

Thanks,
JColvin