Jump to content
  • 0

JTAG-HS3 programming speed variability


Mike Placke

Question

We are using several copies of the JTAG-HS3 programming cable in our lab to load programs to a Xilinx Ultrascale+ device using Vivado via JTAG. Sometimes we can load at 15Mhz clock speed and succeed, sometimes we must cut back to 10MHz to be successful, and sometimes even 7.5MHz when dealing with the same board at different times. Since it is a big program into a big part, higher speed matters. We have tried the standard cable wiggling and swapping cables, but still have not found consistency.

Is there some issue that others have seen, updates that need to be applied, or anything else that may explain the variability?

Any feedback appreciated.

Thanks.

Mike Placke

Link to comment
Share on other sites

1 answer to this question

Recommended Posts

Hi @Mike Placke,

I spoke with our engineer much more familiar with the JTAG HS3 and they suspected that the programming at higher speeds with that particular board has some variability and stability issues associated with it, so essentially (as per my personal understanding) you were lucky to be able to program at those higher clock rates. We do not have any Ultrascale+ devices here at Digilent, so we're not able to do some more in-depth look at the hardware.

Thanks,
JColvin

Link to comment
Share on other sites

Archived

This topic is now archived and is closed to further replies.

×
×
  • Create New...