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amess

Parallel FPGA JTAG programming

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The attached image is probably the easiest way to ask this question ..

We want to program 6 devices all at the same time using 6 copies of a USB-JTAG device (as opposed to having once large JTAG chain). It looks like Impact / Vivado does not natively support this (it sees multiple dongles but only deal with them one at a time). Can we script something to load a BIT file on all 6 simultaneously? We currently have the XUP USB-JTAG Programming Cable but would switch to another one if this one can't do it. Thanks!

parallel-fpga.thumb.png.3d2ca91474d454979bd0e96bbfb8f7ba.png

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An easy way would be to make xc3sprog work with your FPGA (if your JTAG interface is FTDI-based, or get e.g. one FT2232H minimodule for every two JTAG ports), then spawn off multiple processes and identify interfaces via their serial number.

I've done it in the past, more by accident than intentionally (system startup with all FPGA uploads in parallel threads), so yes it is "most likely" feasible. "Most likely" because USB is a technology where I believe only what I can see and then only half of it...

Please note, I'm not referring to any of the "official" libraries. The above-mentioned xc3sprog is one option, I've got my own "in-house" JTAG-over-FTDI codebase.

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Cool. Thanks!

I currently have a bunch of Digilent XUP USB-JTAG adapters. These are not specifically called out on the xc3prog compatibility table here: http://xc3sprog.sourceforge.net/hardware.php

.. but can assume they will work since they claim to be compatible with the Xilinx platform USB cable which is supported by xc3prog?

Also, this being a Digilent site I was hoping to get an answer from them to see if their software supported this natively (referring back to my original multi-programming question)

 

Thanks!

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Hi @amess,

I reached out to one of our design engineers and they responded that it may be possible to accomplish this by launching 6 djtgcfg processes. However, They are not sure if there isn’t something inside of JTSC that serializes transactions across all processes. The djtgcfg application and Adept GUI application aren’t meant to be general purpose FPGA programmers and have only been tested with FPGA’s that are on Digilent system boards. Therefore they cannot guarantee that the FPGA you want to program is even supported. They have not tried doing anything like this so I don’t know what other issues may come up. We would not be able to support this functionality.

Vivado supports tcl scripting so it may be possible to do this with Vivado and a script. However, they are not familiar enough with the supported commands to write the script.  You should contact Xilinx to see if they can provide any suggestions on how to do it using Vivado.

thank you

Jon
 

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