How to program ZYBO Pmod port waveform output to PL part in C language?

[dn_oga]

Recently I bought ZYBO Z7-20.

I installed Vivado, SDxIDE, VivadoHLS (both 2016.4) on the Win 7 PC and started studying.

I'd like to implement an arbitrary digital waveform output program to the Pmod port of ZYBO.

Although I could generate a waveform using Vivado SDK's XGpio_SetDataDirection (), the accuracy is bad. (Example: 1 us width specification → 1.4 us)

I would like to realize arbitrary digital waveform programming with determinism with resolution of 100 ns in the Pmod port of ZYBO in C language.
(In the next step, I would like to realize a structure that measures the arbitrary waveform with high precision in the PL part and tells it to the PS part.)

As a prerequisite, I would like to be able to realize without learning Verilog and VHDL.

Is it possible to realize the above problem with only C language?

I can accomplish the above tasks by using NI product sbRIO and LabVIEW, but I would like to be able to use ZYBO in the same way.

that's all, thank you very much.
(I translated it from Japanese using Google translation, I may not have translated well, sorry.)

[jpeyron]

Hi @dn_oga,

You can use a petalinux platform like what is available on the Petalinux Support for Digilent Boards link. Once you have the petalinux platform you need then you should be able to do everything from there in c. For using vivado and hls you can not use only hls in the block diagram. You could make hls ip cores that potentially facilitates you needs along with the zynq processor and then program using sdk. 

thank you,

Jon

[dn_oga]

Mr. jpeyron, Thank you for your reply.

I downloaded Petalinux-Zybo-Z7-20-2017.4-1.bsp and checked README.md.
However, it seems to be difficult for me.

Since the first post may not translate well, I will add my skill level and what I want to do next.
① No experience building Linux environment.
② No development experience of microcomputer driver development and interrupt processing program.
③ I have application development experience for Windows by VB and VC.
④ Various custom communication (? 00kbps ~? Mbps) implementation using NI sbRIO IO resource in NI LabVIEW, RT module, FPGA module configuration development environment is available.
⑤ Vivado succeeded in digital waveform output with "add IP: ZYNQ 7 Processing System, add IP: AXI GPIO, Generate Bitstream, Launch SDK with XGpio_DiscreteWrite () into helloworld.c".
⑥ I am still in a situation where I do not understand how to use SDxIDE and VivadoHLS.

Since Zynq-7020 which is the same as the above ④sbRIO is implemented in ZYBO Z7-20, we thought that development of a custom communication board with equivalent performance can be realized just by changing the development language to C language.

As a simple example, the FPGA program using LabVIEW can generate an arbitrary waveform output program of ns order by merely combining while changing the waiting time with the flow "Hi / Lo setting to GPIO port and time setting to Wait function" .

After that, just by building and writing the FPGA program, the waveform is output together with the board power on.

Is there no way to program the same thing as above in C language and implement it in the FPGA part of ZYBO?

Thank you for answering the above questions.
 

[jpeyron]

Hi @dn_oga,

I believe you can build a custom HLS ip core in c that takes in a clock and outputs the desired high/low output. Then import it into a vivado block design and make the input and output of the hls ip core external. You would then create a wrapper and constrain the input and output pins in the wrapper with an xdc file.  I do not have any experience with hls. Here is a basic tutorial for hls. I do not know if you will be able to achieve the 10 MHZ you are wanting with an hls project. The best way to ensure you get the 10 MHZ high/low output is using either Verilog or VHDL.

Here is our learn site. I would also suggest looking at fpga4fun as well as the zynq book which has a free download.

thank you,

Jon

[dn_oga]

Mr. jpeyron, Thank you for giving me good information.

There were many tool names and methods for developing with ZYBO and it was a bit confusing. (ISE, SDSoC, APSoc, SDxIDE, Vivado, HLS, Verilog, System Verilog, VHDL, RTL?)

In order to be able to create IP cores in C language, I first understood that it is to try "DEVELOPING CUSTOM IP CORE USING HLS" in "Basic HLS Tutorial".

I immediately advanced to Step 10, but "ZYBO Z7-20" does not exist in the "Part Selection" dialog.

"ZYBO Z7-20" for HLS Where can I get the information on where to find the board definition file and where to place it?
(We did not hit under "C: \ Xilinx \ Vivado_HLS \ 2016.4" hierarchy by "ZedBoard" existing in the dialog list.)

Thank you for answering the above questions.

[jpeyron]

Hi @dn_oga,

Here is the xilinx HLS tutorial Vivado Design Suite Tutorial High-Level Synthesis found here. The tutorial describes selecting the part on page 15.  The part number is XC7Z020-1CLG400C.

cheers,

Jon

[dn_oga]

Mr. jpeyron, Thank you for your answer.

In the continuation from "Step 10" of "DEVELOPING CUSTOM IP CORE USING HLS", I selected 'xc 7 z 020 clg 400 - 1' on the dialog of "Part Selection" and proceeded.

The following error occurred in "Click the Run C Synthesis toolbar button" and the solution was not understood.

ERROR: [HLS 200-70] Compilation errors found:
Pragma processor failed: modulator.cpp: 24: 18: error: assigning to 'ap_uint <1> *' from incompatible type 'int'
         pwm_out = 1;

Next I installed Vivado HLS 2017.4 and carried out up to P32 of "Vivado Design SuiteTutorial".

However, understanding does not advance and the remaining page amount is also large, so I may not understand it with my ability.

I am considering switching to a policy to study Verilog. Although I may not be able to understand this also with my ability.

I am sorry for poor understanding. thank you for everything.

[jpeyron]

Hi @dn_oga,

Your error appears to be a data type conflict. We would be able to assist you more with using verilog. I would suggest to go through the learn and fpga4fun sites.

thank you,

Jon