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M. Betz

CMOD A7: accessing the SPI Flash

Question

I'm trying to get the picosoc project working on a CMOD A7. This is a soft-CPU running code directly from an SPI flash chip, hence I want to get access to the N25Q032A13EF440F pins from verilog.

Looking at the Schematic and the .xdc file from the board support package, I can find definitions for qspi_cs and qspi_dq[0-4], which are the chip select and data lines respectively. However there is no definition for for the QSPI_SCK net, which connects to the FPGA pins CCLK_0 and IO_L3N_T0_DQS_EMCCLK_14, both of which are not defined in the .xdc file.

Is that deliberately so?

Cheers
Michael Betz

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Hi @M. Betz,

You can find the QSPI_SCK pin E19 in the schematic.  Not every pin that can be constrained is in the xdc we provide.  I would suggest to try the constraint below.

#set_property -dict { PACKAGE_PIN E19 IOSTANDARD LVCMOS33 } [get_ports { qspi_sck }];

thank you,

Jon

Edited the E13 to E19

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@jpeyron,

Could you double check this for @M. Betz?

I'm looking at the schematic and not finding this pin.  I know from some of my other designs (Basys3) that you need to access this pin through the STARTUPE2 primitive, but that the Arty had a GPIO pin tied also tied to that line so that the Arty didn't need the STARTUPE2 primitive.  It was because of this that the Basys3 didn't have the SCK flash pin in the XDC file.

Looking over the CMod A7 schematic, I don't see those pins tied anywhere, so I would imagine that the STARTUPE2 primitive would be necessary to access that wire.

Dan

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Hi,

thanks for the quick response! I didn't know about the STARTUPE2 primitive, which seems to be exactly what I need. I'll give it a shot and let you know.

Cheers

Michael

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@jpeyron,

Ok, thanks, I now see on the left side of the chip, location B2 of page 2 of the schematic, that this pin also connects to SCK as with the Arty.  It's just not drawn as clearly.

@M. Betz,

You should be able to use either the STARTUPE2 primitive or the E19 pin.  Both should work.

Dan

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Hi,

1 hour ago, D@n said:

You should be able to use either the STARTUPE2 primitive or the E19 pin.  Both should work.

You are right, both methods work, I was just able to confirm it with a scope.

To wrap it up, one way is to add this to the .xdc file:

set_property -dict { PACKAGE_PIN E19 IOSTANDARD LVCMOS33 } [get_ports { qspi_sck }];

The other way is to use this primitive:

STARTUPE2 #(
    .PROG_USR("FALSE"),    
    .SIM_CCLK_FREQ(10.0)
) STARTUPE2_inst (
    .CFGCLK     (/* NC */),
    .CFGMCLK    (/* NC */),
    .EOS        (/* NC */),
    .PREQ       (/* NC */),
    .CLK        (1'b0),
    .GSR        (1'b0),
    .GTS        (1'b0),
    .KEYCLEARB  (1'b0),
    .PACK       (1'b0),
    .USRCCLKO   (SPI_CLK),
    .USRCCLKTS  (1'b0),
    .USRDONEO   (1'b0),
    .USRDONETS  (1'b1) 
);

Thanks jpeyron and D@n for your quick help!

Cheers
Michael

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