I'm trying to get the picosoc project working on a CMOD A7. This is a soft-CPU running code directly from an SPI flash chip, hence I want to get access to the N25Q032A13EF440F pins from verilog.
Looking at the Schematic and the .xdc file from the board support package, I can find definitions for qspi_cs and qspi_dq[0-4], which are the chip select and data lines respectively. However there is no definition for for the QSPI_SCK net, which connects to the FPGA pins CCLK_0 and IO_L3N_T0_DQS_EMCCLK_14, both of which are not defined in the .xdc file.
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M. Betz
I'm trying to get the picosoc project working on a CMOD A7. This is a soft-CPU running code directly from an SPI flash chip, hence I want to get access to the N25Q032A13EF440F pins from verilog.
Looking at the Schematic and the .xdc file from the board support package, I can find definitions for qspi_cs and qspi_dq[0-4], which are the chip select and data lines respectively. However there is no definition for for the QSPI_SCK net, which connects to the FPGA pins CCLK_0 and IO_L3N_T0_DQS_EMCCLK_14, both of which are not defined in the .xdc file.
Is that deliberately so?
Cheers
Michael Betz
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