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Compatibility Pmod Boards <-> Pmod Ports


Geralt

Question

Hello!

In the hardware user's guide of the ZedBoard I read the following:

"Four Pmod connectors interface to the PL-side of the EPP. These will connect to EPP Bank 13 (3.3V). One Pmod, JE1, connects to the PS-side of the EPP on MIO pins [7,9-15] in EPP MIO Bank 0/500 (3.3V). Uses for this Pmod include PJTAG access (MIO[10-13]) as well as nine other hardened MIO peripherals (SPI, GPIO, CAN, I2C, UART, SD, QSPI, Trace, Watchdog).
Two of the Pmods, JC1 and JD1, are aligned in a dual configuration and have their I/O routed differentially to support LVDS running at 525Mbs."

My question is: Can I use ALL of those Pmod ports to connect the external ADC add-on boards "Pmod AD1" and "Pmod AD2" to them? Or can those ADC add-on boards only be used with a certain type of Pmod port, for example only with a Pmod connector that is connected to the PL, only with a Pmod connector that does not have differentially routed conductors for LVDS, etc.?

Best regards!

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@Geralt

In my experience differential IO could be a problem if used as single ended. Since these traces are tighly coupled it is expected that when driven independently transients on one trace will create some level of sprious transients on the adjacent trace. Considering this scenario, the ADC counter will count these spikes as coming from the ADC chip producing erroneous result.

The only practical mitigation I found working is to control the slope of SPI signals in the xdc constraints file. The other option is to use a different COTS board with shorter traces.

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On 04/03/2018 at 4:43 AM, Geralt said:

Hello!

In the hardware user's guide of the ZedBoard I read the following:

"Four Pmod connectors interface to the PL-side of the EPP. These will connect to EPP Bank 13 (3.3V). One Pmod, JE1, connects to the PS-side of the EPP on MIO pins [7,9-15] in EPP MIO Bank 0/500 (3.3V). Uses for this Pmod include PJTAG access (MIO[10-13]) as well as nine other hardened MIO peripherals (SPI, GPIO, CAN, I2C, UART, SD, QSPI, Trace, Watchdog).
Two of the Pmods, JC1 and JD1, are aligned in a dual configuration and have their I/O routed differentially to support LVDS running at 525Mbs."

My question is: Can I use ALL of those Pmod ports to connect the external ADC add-on boards "Pmod AD1" and "Pmod AD2" to them? Or can those ADC add-on boards only be used with a certain type of Pmod port, for example only with a Pmod connector that is connected to the PL, only with a Pmod connector that does not have differentially routed conductors for LVDS, etc.?

Best regards!

I also have the same question. How many total nos of AD2 pmods we can connect with zedboard? JA1 , JB1 pmod host ports are fine. Pmod AD2 is 4 channel. How to connect them to differential pmods JC1 & JD2. please also discuss about JE1 MIO pmod?

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Hi @sourav,

The differentially paired pmod ports should work fine with pmods. At higher frequencies there could be issues using these paired pin as single ended but not at the rates we use the pmods. You can use all the Pmod ports except JE since it is tied directly to the mio pins of the PS.  

cheers,

Jon

 

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