mbo Posted February 27, 2018 Share Posted February 27, 2018 hi folks I just want to ask if there is a pmod ip for the seven-segment decoder in vivado? I've searched out the vivado-library-master but there's nothing in for ssd. BR, Mirco Link to comment Share on other sites More sharing options...
artvvb Posted February 27, 2018 Share Posted February 27, 2018 @mbo Unfortunately, we don't currently have an IP for the Pmod SSD. If you are designing for it in a Microblaze or Zynq project, I'd recommend that you use the AXI GPIO IP core. The attached screenshots show where I would start for creating the hardware, note that the two Pmod headers of the SSD should be on the same GPIO channel so that setting each of the cathode pins and the digit select pin use the same XGpio_DiscreteWrite call in SDK. The process I went through here was to add an AXI GPIO, configured it as below, right clicked on the output port of the GPIO interface and select "Make External". I then added a constraint file to constrain the output port to JA and JB of, in my case, the Arty. Link to comment Share on other sites More sharing options...
JColvin Posted February 27, 2018 Share Posted February 27, 2018 Hi @mbo, In addition to what @artvvb said, the Basys 3 Abacus demo also has some associated HDL for a seven segment display (built into the Basys 3 itself) if you wanted to look at that as well. Thanks, JColvin Link to comment Share on other sites More sharing options...
mbo Posted February 28, 2018 Author Share Posted February 28, 2018 Hi @JColvin and @artvvb, thank you guys for your help. For further information I am using a Zybo Z7-10. After I have found the Z7-Master.xdc file it worked well. I am using the four buttons of zybo board to control the two 7-segment displays and its nice. Thank you for your help. You guys are awesome. Mirco Link to comment Share on other sites More sharing options...
mbo Posted February 28, 2018 Author Share Posted February 28, 2018 Hey @JColvin and @artvvb, if I want to set e.g. the number "1" for the seven-segment display I use the command: XGpio_DiscreteWrite(&output, 1, 0b00000110); the number will show on the right display, but if I change the "first" digit to 1 which means: XGpio_DiscreteWrite(&output, 1, 0b10000110); the number will be shown on the left display. Is there any chance I can show the number "10" with both displays, this means "1" on left display and "0" on right display? Thanks, Mirco Link to comment Share on other sites More sharing options...
artvvb Posted February 28, 2018 Share Posted February 28, 2018 Quoting the Reference Manual: Quote Because only one digit can be lit at a particular time, users that want to use both digits to display a particular value will need to alternately light up the two digits at least every 20 milliseconds (50 Hz). This will correlate to each digit being lit up for 10 milliseconds each before the other segment needs to be “turned on”. Higher refresh rates can be achieved by alternating which digit is currently powered at shorter time intervals. Thanks, Arthur Link to comment Share on other sites More sharing options...
mbo Posted March 1, 2018 Author Share Posted March 1, 2018 @artvvb Thank you for that information. I think I've missed it. Unfortunately thats what I thought. Thanks, Mirco Link to comment Share on other sites More sharing options...
Tore Sæderup Posted March 2, 2018 Share Posted March 2, 2018 The only way to show two digits "at once" is, as mentioned, rapid switching. It looks good enough, but requires constant attention from the processor. You will probably need to start a dedicated thread for the display, unless your code is very short and looping. Link to comment Share on other sites More sharing options...
artvvb Posted March 2, 2018 Share Posted March 2, 2018 It is also possible to create an IP or an HDL module that can sit between the AXI GPIO controller and the PmodSSD port. Creating a module is significantly easier. The following is a portmap for a module with a slave GPIO interface that can be connected to an output-only 8-bit AXI GPIO controller. module pmodssd ( // clock interface (* X_INTERFACE_INFO = "xilinx.com:signal:clock:1.0 clk CLK" *) (* X_INTERFACE_PARAMETER = "FREQ_HZ 100000000" *) input clk, // 8-bit slave GPIO interface (master should be configured 8-bit output-only) (* X_INTERFACE_INFO = "xilinx.com:interface:gpio:1.0 GPIO_I TRI_I" *) input [7:0] gpio_i, // Pmod seven-segment display ports output [6:0] seg, output an ); //Add user code here endmodule If this code is placed into a verilog source file in the project, it can be added into the block diagram by right clicking on some empty space in the diagram and selecting "Add Module". The interfaces and output ports need to be manually connected to some output ports constrained by the XDC, and the appropriate GPIO interface and clock source. The "user code" mentioned in the module can be pretty much whatever you want, it could decode two 4-bit numbers into segment codes, and toggle between the two digits, for example. Cheers, Arthur Link to comment Share on other sites More sharing options...
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mbo
hi folks
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