I am fairly new to FPGAs, but I have managed to get my Arty board to work with a bunch of Pmods through Vivado software with MicroBlaze. At this point, I am trying to use AXI Quad SPI for collecting data from an external ADC. I have my own 16-bit ADC (connected to a detector) which has an event flag pin that goes high when an event is detected. The flag is supposed to be latched high until the CPU responds and shifts out the 16-bit value. I wonder how can I implement such design inside my block diagram? I tried adding a SPI connector to my diagram, but as far as I see there is no pin on SPI block that I can connect my event flag to. Any help is highly appreciated.
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Mahdi
Hello guys,
I am fairly new to FPGAs, but I have managed to get my Arty board to work with a bunch of Pmods through Vivado software with MicroBlaze. At this point, I am trying to use AXI Quad SPI for collecting data from an external ADC. I have my own 16-bit ADC (connected to a detector) which has an event flag pin that goes high when an event is detected. The flag is supposed to be latched high until the CPU responds and shifts out the 16-bit value. I wonder how can I implement such design inside my block diagram? I tried adding a SPI connector to my diagram, but as far as I see there is no pin on SPI block that I can connect my event flag to. Any help is highly appreciated.
Mahdi
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