Zybo-Z7: SDK seems broken, cannot finish the guide

[freakuency]

I wanted to try the example Audio-DMA project but it went really bad. This is what I did and the output from Vivado and SDK 2017.4.

Source the make_project.tcl.
Update the ip because I must.
Get eight critical warnings, e.g., [PSU-1]  Parameter : PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_0 has negative value -0.050 .
Generate output products.
Generate HDL wrapper so I can extract the hardware.
IIC ports names differ in the .xdc so I have to change them to capital letter (IIC). Also notice that the ja ports are there, I don't know why though.
Generate the bitfile. Got 1715 warnings, mostly unconnected ports. Also about some unused sequential elements removed which can be bad.
Export hardware with bitfile.
Launch SDK and import 'Existing Projects into Workspace', i.e., the 'sdk' subfolder which yielded this;

Quote

 

22:49:45 ERROR    : (XSDB Server)ERROR: [Hsi 55-1594] Core cpu_cortexa9 of version 2.3 not found in repositories

22:49:45 ERROR    : (XSDB Server)ERROR: [Hsi 55-1452] Error: running open_sw_design.

22:49:45 ERROR    :  [Common 17-39] 'hsi::open_sw_design' failed due to earlier errors.
22:49:45 ERROR    : (XSDB Server)ERROR: [Hsi 55-1594] Core cpu_cortexa9 of version 2.3 not found in repositories

22:49:45 ERROR    : (XSDB Server)ERROR: [Hsi 55-1452] Error: running open_sw_design.

22:49:45 INFO    : Unable to read in MSS file /home/freakuency/Documents/digilent_zybo_20_examples/Zybo-Z7-20-DMA/sdk/dma_bsp/system.mss : null
22:49:45 ERROR    : (XSDB Server)ERROR: [Hsi 55-1594] Core cpu_cortexa9 of version 2.3 not found in repositories

22:49:45 ERROR    : (XSDB Server)ERROR: [Hsi 55-1452] Error: running open_sw_design.

22:49:45 ERROR    : Failed in generating sources
22:49:45 INFO    : BSP Project P/dma_bsp has been successfully migrated.
22:50:40 ERROR    : (XSDB Server)ERROR: [Hsi 55-1594] Core cpu_cortexa9 of version 2.3 not found in repositories

22:50:40 ERROR    :  [Common 17-39] 'hsi::open_sw_design' failed due to earlier errors.
22:50:40 ERROR    : (XSDB Server)ERROR: [Hsi 55-1452] Error: running open_sw_design.

22:50:40 ERROR    : (XSDB Server)ERROR: [Hsi 55-1594] Core cpu_cortexa9 of version 2.3 not found in repositories

22:50:40 ERROR    : (XSDB Server)ERROR: [Hsi 55-1452] Error: running open_sw_design.

22:50:40 INFO    : Unable to read in MSS file /home/freakuency/Documents/digilent_zybo_20_examples/Zybo-Z7-20-DMA/sdk/dma_bsp/system.mss : null
22:50:40 ERROR    : Failed to closesw "/home/freakuency/Documents/digilent_zybo_20_examples/Zybo-Z7-20-DMA/sdk/dma_bsp/system.mss"
Reason: Cannot close sw design '/home/freakuency/Documents/digilent_zybo_20_examples/Zybo-Z7-20-DMA/sdk/dma_bsp/system.mss'.
Design is not opened in the current session

 

I see this in the guide; Many apparent errors at this stage can be solved by right-clicking the bsp project and selecting Re-generate BSP Sources.
Ok, try;

Quote

 

22:51:09 ERROR    : (XSDB Server)ERROR: [Hsi 55-1594] Core cpu_cortexa9 of version 2.3 not found in repositories

22:51:09 ERROR    :  [Common 17-39] 'hsi::open_sw_design' failed due to earlier errors.
22:51:09 ERROR    : (XSDB Server)ERROR: [Hsi 55-1452] Error: running open_sw_design.

22:51:09 ERROR    : (XSDB Server)ERROR: [Hsi 55-1594] Core cpu_cortexa9 of version 2.3 not found in repositories
ERROR: [Hsi 55-1452] Error: running open_sw_design.

22:51:09 INFO    : Unable to read in MSS file /home/freakuency/Documents/digilent_zybo_20_examples/Zybo-Z7-20-DMA/sdk/dma_bsp/system.mss : null
22:51:09 ERROR    : Unexpected error occurred during generating bsp sources
java.lang.reflect.InvocationTargetException
    at org.eclipse.jface.operation.ModalContext.run(ModalContext.java:398)
    at org.eclipse.jface.dialogs.ProgressMonitorDialog.run(ProgressMonitorDialog.java:481)
    at org.eclipse.ui.internal.progress.ProgressMonitorJobsDialog.run(ProgressMonitorJobsDialog.java:242)
    at org.eclipse.ui.internal.progress.ProgressManager$3.run(ProgressManager.java:895)
    at org.eclipse.swt.custom.BusyIndicator.showWhile(BusyIndicator.java:70)
    at org.eclipse.ui.internal.progress.ProgressManager.busyCursorWhile(ProgressManager.java:930)
    at org.eclipse.ui.internal.progress.ProgressManager.busyCursorWhile(ProgressManager.java:905)
    at org.eclipse.ui.internal.progress.ProgressManager.run(ProgressManager.java:1078)
    at com.xilinx.sdk.sw.ui.handlers.RegenBspSourcesHandler.execute(RegenBspSourcesHandler.java:124)

 

I can open the file in any text editor but SDK just shows a big red sign and 'Failed to create the part's controls'.
There is also a small textbox where I can almost scroll around and see the content.

In the problems tab I see this;

Quote

Description                                                                  Resource    Path                               Location    Type
fatal error: xparameters.h: No such file or directory    userio.c       /dma/src/userio              line 54       C/C++ Problem
make: *** [src/userio/userio.o] Error 1                        dma                                                                     C/C++ Problem
recipe for target 'src/userio/userio.o' failed                 subdir.mk     /dma/Debug/src/userio   line 18     C/C++ Problem

If I comment that include out, this is shown instead;

Quote

Description                                                            Resource    Path                    Location   Type
fatal error: xstatus.h: No such file or directory      userio.h      /dma/src/userio    line 56      C/C++ Problem
make: *** [src/userio/userio.o] Error 1    dma                                                                       C/C++ Problem
recipe for target 'src/userio/userio.o' failed        subdir.mk    /dma/Debug/src/userio    line 18    C/C++ Problem
Invalid project path: Include path not found (../Zybo-Z7-20-DMA/sdk/dma_bsp/ps7_cortexa9_0/include).    dma        pathentry    Path Entry Problem

And that path do indeed not exist. Probably because that path does not exist, so doesn't the cpu_cortexa9 2.3 either.
What can I possibly have done wrong, and what are all these Java errors? Is this something I should ask Xilinx about instead?
Also, before this I tried the DRAM test program as a first thing. It failed so I thought I would just try something else in the meanwhile and this is what I got.
Bad start for a new board =\.

 

 

[jpeyron]

Hi @freakuency,

I would

  1) close SDK,

  2) delete the .meta folder,

  3) restart SDK and then

  4) re-import the existing SDK projects. 

Here is a forum thread that discusses this as well as adding the libraries to the linker.

thank you,

Jon

 

[freakuency]

Thanks! Unfortunately that didn't help. This evening I will try building some of the other examples. Eventually I will try making my own simple project from scratch if this problem persists. 

[jpeyron]

Hi @freakuency,

Another option would be to download Vivado 2016.4. The version does matter when dealing with demos. This project was made in Vivado 2016.4 for Vivado 2016.4. 

thank you,

Jon

[freakuency]

I'm downloading it but it is a long shot. I worked around the problem by not following the guide. Instead I added the files with ''Import Filesystem´´ and got the code running.
However, it never finishes recording, i.e., a DMA S2MM event never happens. I also have one ZynQ system/project without any PL just to try the DDR3, using the example project you can find when starting the New Project Wizard. Its output is;

Quote

 

Connected to /dev/ttyUSB1 at 115200
--Starting Memory Test Application--

NOTE: This application runs with D-Cache disabled.As a result, cacheline requests will not be generated

Testing memory region: ps7_ddr_0

    Memory Controller: ps7_ddr_0

         Base Address: 0x100000 

                 Size: 0x1FF00000 bytes 

          32-bit test: FAILED!

          16-bit test: FAILED!

           8-bit test: FAILED!

Testing memory region: ps7_ram_1

    Memory Controller: ps7_ram_1

         Base Address: 0xFFFF0000 

                 Size: 0xFE00 bytes 

          32-bit test: PASSED!

          16-bit test: PASSED!

           8-bit test: PASSED!

--Memory Test Application Complete--

 

Now I have no clue what do anymore nor time as it is getting really late. But there is something wrong with the memory now I believe.

[jpeyron]

Hi @freakuency,

With the DMA project are you using tera term for the serial terminal? I believe the buttons control the state of the project. So you are using the buttons and not recording or playing back? Are you able to run any of the other linked projects on the resource center?

thank you,

Jon

[freakuency]

I tried another @jpeyron, the HDMI, but it was old and needed to upgrade the IPs. But to upgrade the IPs I needed to "verify the changes" or something similar, which of coarse was impossible to do, so I came nowhere. I clicked the button which said the same thing (I should do), scrolled down the window with uninteresting text but I still couldn't upgrade them. I used the terminal in SDK, and I used the correct button to start recording. I'm still concerned about the DRAM, I cannot understand why I cant run the memory test on them.

[jpeyron]

Hi @freakuency,

 Did you install to board files as described here? If the zynq processor is not configured correctly you might get memory issues. Please download Vivado 2016.4 and try the hdmi demo again. 

thank you,

Jon

[dfergenson]

@freakuency, I had the same problem with the HDMI example as you did and ran into the same stumbling block. Here's how I resolved the issue with @jpeyron's help.

The IP report window is confusing. When you click on the Upgrade IP link, it just reminds you of the importance of checking the log and then upgrading the IP. Not helpful... But at the bottom of the screen (and this is sometimes obscured on different sized windows) is a button to upgrade the IP. If you check the box next to the out of date IP, (in the case of the HDMI Zybo Z7-20 demo, its DVI2RGB) you can update it.

The outdated IP creates a downstream problem because it prevents an HDL wrapper from being created around the block diagram which you now need to do by right clicking on the .bd in the source code browser. If you do this, you can generate a bitstream.

I'm still stumbling over actually getting the SDK to work. I ran into the same problem that you did and so far haven't gotten past it.

@jpeyron, although it didn't help @freakuencycan you tell me where to find the .meta file to delete?

[jpeyron]

Hi @dfergenson,

I believe this xilinx forum thread  here explains more where the .meta folder is.

thank you,

Jon