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Zybo z7-20 Zynq Presets


mohammadhgh

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Hello everyone,

I have just started a project with the Zybo Z7-20 board and I am trying to build a simple system using Vivado IP Integrator. I have added the Zybo Z7-20 board files to the Vivado but the board still does not appear in the presets for Zynq Processing System. Also I was not able to find any presets tcl file for the board in the internet. Does any one know where can I find this presets tcl file for the board is there any reference Vivado project for the board to start with?  

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@BogdanVanca Thank you for you reply. 

I tried to add the board_files for Zybo Z7-20 to Vivado 2017.4 using the instructions in this, but the Zybo Z7-20 board still does not appear while configuring the Zynq7 Processing System IP in Vivado IP Integrator. 

image.png.094f51d3bb998a9caa8d16a1a5fc0b4d.png 

when trying to apply configuration, it just accepts .tcl files and not .xml files. Also importing the presets.xml file through the "Import XPS Settings" button seems to have no effect!  I found that .tcl file for the Zybo board here but it was not available for Zybo Z7-20. Is it possible to use the ZYBO_C.tcl for the Zybo Z7-20 too? Or how can I fix the problem that Zybo Z7-20 does not appear in the Vivado presets list?

Thank you in advance.

Edited by mohammadhgh
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Hi @Mahesh,

Make sure you have installed the board files. When you create a new project are you able to select boards and click on your board? Here is the zybo-z7 resource center. It has quite a few tutorials to help you install board files and get your projects going. Please be more specific about your issue. Could you attach a screen shot of your issue?

thank you,

Jon

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9 hours ago, jpeyron said:

Hi @Mahesh,

Make sure you have installed the board files. When you create a new project are you able to select boards and click on your board? Here is the zybo-z7 resource center. It has quite a few tutorials to help you install board files and get your projects going. Please be more specific about your issue. Could you attach a screen shot of your issue?

thank you,

Jon

Hi @jpeyron,

I have installed the board files and i am using Arty Z7-20. I am able to successfully run few projects on the board and got the output as expected. I want to run 2 bare metal applications on the ARM processor and following XAPP1079 example project. I am able to build the project but app_cpu0.elf file is not loading onto the hardware. Its popping the error message that "ERROR    : Memory write error at 0x100000. APB AP transaction error, DAP status f0000021" and later on found that ZYNQ system has ZC702 board preset files. Now i want to change it into ARTY-z7 20 but its not showing under preset button. if i import preset.xml file using "Import XPS Settings" also the same error message (ERROR    : Memory write error at 0x100000. APB AP transaction error, DAP status f0000021) is coming in SDK platform while loading .elf file.

image.thumb.png.950f673fb29aa35a9b2e2b3b110a9407.png

 

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Hi @Mahesh

As @jpeyron said in the post marked as accepted solution, the Zynq processing system will be configured with the board presets when you first add the Zynq processing system IP core to the block design and run the block automation task from the green message that appears! Just remember to keep the Apply Board Preset option checked as shown in he picture. So this means if you are using the pre-built block design from the example project, a possible solution can be to remove the existing Zynq processing system block and adding a new one!

 

Screenshot from 2018-05-31 01-05-06.png

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Deleting the existing Zynq block and adding a new one will give you the possibility to apply the presets. However, any configuration change you did before (e.g. adding gpio, ddr ports etc.) will be lost. Even if there are connections created between blocks - these will be deleted then.

Actually I stored a preset from a design which is a bit more complex and use this for other designs. Not used things can be switched off later. As long as my understanding of the Zynq block isn't that good, I prefer starting with something validated instead of searching to much in the settings.

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I think Digilent provides these presets in an XML file.  When I compared the .xml file for my board to a .tcl file for another zynq board they look like the same properties in a different format.  I think you can manually import them using the Import XMS settings button to the right of the Presets button.  I imagine the comments above also apply in that these preset will automatically get applied if you use the Digilent supplied board file.  

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On 2/18/2018 at 6:56 PM, mohammadhgh said:

Hello everyone,

I have just started a project with the Zybo Z7-20 board and I am trying to build a simple system using Vivado IP Integrator. I have added the Zybo Z7-20 board files to the Vivado but the board still does not appear in the presets for Zynq Processing System. Also I was not able to find any presets tcl file for the board in the internet. Does any one know where can I find this presets tcl file for the board is there any reference Vivado project for the board to start with?  

I am currently having the exact same problems, with Vivado 2020.2, running on a LINUX (like Mohammadhgh) and the ZYBO Z7. I don't remember such thing with 2020.2 on Windows (going to give it a try). No such problem with an other Digilent board like the Cora Z7.

The facts with the Zybo Z7 :

- I have the board files properly installed,

- the checkbox "Apply Board preset" is well checked when doing automation,

- when configuring the Zynq IP, everything is empty (No UART, NO GPIOs etc...), hence it synthesizes with warnings and doesn't work afterwards with Vitis (mem crashes...)

It seems something could be wrong with Vivado 2020.2 Linux (https://forums.xilinx.com/t5/Embedded-Development-Tools/Zybo-7Z-HelloWorld-fails-to-execute-consistently-Vivado-Vitis/m-p/1242056) but I think something may be wrong too (or incompatible), with the board definitions of the Zybo, because this does not happen with the Cora Z7.

Thanks,

Vincent.

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I tested today on Windows. I can confirm that the problem is only with 2020.2 Linux, ZyboZ7 (no problem with Zybo) It looks like something in the presets files of the Z7 prevents the automation to use it properly. Therefore, it just presets nothing.

If I open a project generated with windows version, or if I apply a TCL preset script (see attached .tcl file) made with the windows version, there is still a problem on the Linux version, which may be a hint for that problem: the ENET0 clock is  in error state. See screenshot:Screenshot_clockENET0_err.png.983b3ab454cf4ecc5b657a3628fe4db7.png

A possibility would be to use the ARM PLL instead of the IO PLL, but it has consequences on other clocks:

Screenshot_clockENET0_ARM_PLL.png.971f1b750c78475c64c8813a53ea7d79.png

 

Zynq_ZyboZ7_IPinit.tcl

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Hi @Grensv,

I'm not sure what to tell you; Digilent doesn't make different preset files for our boards for different versions of Vivado nor operating systems. You can see that the presets that are available for the Zybo Z7-20 and the Cora Z7-10 also set up their Ethernet 0 clock sources and frequencies in the exact same way; lines 29 and 33 for the Zybo Z7 https://github.com/Digilent/vivado-boards/blob/master/new/board_files/zybo-z7-20/A.0/preset.xml, and lines 31 and 35 for the Cora Z7 https://github.com/Digilent/vivado-boards/blob/master/new/board_files/cora-z7-10/B.0/preset.xml.

Based on this, what seems more likely to me is that there is a bug in the Linux version of Vivado 2020.2.

I don't have a Linux machine to test this (I only have Windows 10), but I would be interested to know if this same issue occurs with the Arty Z7-20 board files where you get the red text and errors for setting Ethernet0 to 1000 Mbps using an IO PLL only on the Linux installation, and if the Arty Z7-10 and the Zybo Z7-10 (since you mentioned you saw this on the Zybo Z7-20 specifically) seem to have their presets applied as intended just like the Cora Z7-10 does.

Thanks,
JColvin

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Hi @JColvin,

Thank you for your answer.

I gave a try with Arty Z7-20 and Vivado 2020.2 Linux. Seems to work properly: with just the Zynq IP, no strange things after running automation, generation of BD, synthesis and implementation are running flawless. See screenshot of the clocks: no error with ENET0. I couldn't test it for real: I don't have any Arty.

About the Zybo: it works fine with Zybo, error is on both ZyboZ7-10 and Z7-20.

We have to admit that the bug is specific to the Linux version, but it's quite frightening that such weird behavior can happen from one version to another

Vincent.

Screenshot_20210928_094716.png

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OK, Problem solved, thanks to a colleague at Grenoble-Alpes university. This issue is related to separators in files, which can cause problem with regional settings of Linux. Changing my settings from fr_FR to en_US solves the problem.

It is still strange that the Zybo board files work fine in fr_FR, and not the ZyboZ7.

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