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ADC pin's (auxillary ADCs) values jumps to 0.4V after programming


subasheee

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Hi,

I tried the example project named Nexys Video XADC Demo present at the resource center.
Before programming the FPGA, the voltage values of AD1, AD0, AD8, and AD9  are very low (20mV) w.r.t the ground. If the FPGA is programmed, the voltage of AD1, AD0, AD8, and AD9 jumps to 0.4V, even without any input to them (ADC pins are kept open).

Besides, after programming, if i provide 500mv unipolar sine signal to just AD1, the sine signal is appearing at other pins such as AD0, AD8, and AD9.

I am not able to understand the reason behind the voltage jump and  why the signal given at one ADC appears at others before and after programming the FPGA.

Help is much appreciated.

Regards,

Subash

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Hello @subasheee,

I ran the same project on Vivado 2016.4 for the Nexys Video XADC and all the values were being measured as expected. There are a couple of pictures here and here of my setup, with the blue rails on the side as my ground wires.

I'm not certain how yours is set up but one thing that I did notice is that I needed to have all of the positive input of the pins connected to something rather than just floating, otherwise they would float around 200 mV or so and if left floating would fluctuate with inputs provided to the other pins. In particular pin 3 (the A8) would very closely match pin 1 (A1) if A1 was provided an input and A8 was left floating.

Let me know if you have any questions about this.

Thanks,
JColvin

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On 2/11/2018 at 12:21 AM, subasheee said:

Hi,

I tried the example project named Nexys Video XADC Demo present at the resource center.
Before programming the FPGA, the voltage values of AD1, AD0, AD8, and AD9  are very low (20mV) w.r.t the ground. If the FPGA is programmed, the voltage of AD1, AD0, AD8, and AD9 jumps to 0.4V, even without any input to them (ADC pins are kept open).

Besides, after programming, if i provide 500mv unipolar sine signal to just AD1, the sine signal is appearing at other pins such as AD0, AD8, and AD9.

I am not able to understand the reason behind the voltage jump and  why the signal given at one ADC appears at others before and after programming the FPGA.

Help is much appreciated.

Regards,

Subash

 

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Hi JColvin,

Thanks, you are correct.
Apparently the unused ADC pins should not be kept open. Th unused pins should be either grounded or connected to a external buffer circuits.
If not somehow, the siganl given in one ADC pins is passed to other pins.

Regards,
Subash

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