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sandy

zybo DVI to RGB

Question

I have been trying to use digilent DVI to RGB IP for zybo board, the pixel clock from the ip gives an output of 100MHz , is there any way to reduce the pixel clock frequency , if so can someone please tell me how.

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The pixel clock is directly derived from the video input, TMDS CLK. One character is 10 bit. Since it is DDR your pixel clock is 5 times lower than the serial, i.e., bit clock.

Edited by theUltimateSource

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