Zybo Z7 as standalone FPGA

[Juan]

Hello guys, I'm starting to work with Zybo Z7-20, and I've read this in the Zybo Z7 Reference Manual: 

"It is also possible to treat the Zynq AP SoC as a standalone FPGA for those not interested in using the processor in their design."

Can anyone tell me how can I do this please? I just want to treat the Zynq as a standalone FPGA. Any examples on how to do that?

Thank you!!!

[jpeyron]

Hi @Juan,

Here is a forum thread asking a similar question about the Arty-Z7 which has a zynq processor as well.  You can create hdl projects using Verilog/VHDL code that does not use the ZYNQ processor for the Zybo-Z7-20. Here is an XADC project for the Zybo-Z7-20 that does not use the ZYNQ processor.  Certain components like the usb uart can only be used with the ZYNQ processor. The image describing the ZYNQ processor on page 7 of the reference manual here show this as well.

cheers,

Jon

 

 

 

 

[dbkincaid]

Juan,

When learning/frustrated with Zynq I had the same questions.  The main thing is that the system clock will typically come from a Zynq processor block.  I would encourage you to drop down a Zynq block and use AXI_GPIO blocks to talk to each other to start off.  As an example set up one as output only and the other as input only.  This will simplify your (C) program.  These blocks will route themselves on the block design using the automation tool.  When you have learned the basics of using the GPIO blocks in the SDK (C) you will be ready to do lots of general communication and easier debug.  

At that point you are all set for stand-alone FPGA design, and can drop back Zynq to just the processor and clock out, or you can continue to use AXI_GPIO blocks as stimulus and capture for your logic design.

Good luck!