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Zybo Z7 HDMI project build issue


dbkincaid

Question

When building the HDMI project using the Vivado TCL command line I get errors after the block design section when the script attempts to build a wrapper.  The source of the issue is that the block design pulls a HDMI core that is older than the one in my repository, so there is a 'update library' warning/error but it crashes the build with errors downstream.

I was successful with a workaround by breaking the build into (everything to block design).tcl and (everything after block design).tcl and I update the IP on the block design in between.  

I was hoping someone more familiar with the tcl scripting could propose a solution to the 'update IP' issue.

Thanks!

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Hi @dbkincaid,

Thank you for bringing this up to us. I tested both the hdmi zip and github projects for the zybo-z7-20 with similar issues. On monday we will fix and re-release this project. One of our IP Core was recently upgraded and I believe this is causing the issue.  I was able to get the github project working. After the project loads with the errors i upgraded the ips by clicking in tools->reports->report ip status and clicking to upgrade all checked ips. I then created a wrapper and was able to generate a bitstream from there.

thank you,

Jon

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Ok I wondered if I was the only one with the issue.  I was able to work around, I was actually kinda hoping for a TCL guru to pop-in and say oh if you want to auto-update all IP's just write blah blah blah :)

Is the new release going to be 2016.4 or 2017.4?

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Hi @dbkincaid,

The new release will be for 2017.4. As for the TCL gurus, you would likely have better luck getting that on the Xilinx Forums; those of us at Digilent don't necessarily have any more access to TCL commands outside of Xilinx's reference guide. Though I agree, a simple TCL command would be sweet :)

Thanks,
JColvin

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