Hints on using the Nexys Video DPTI host interface.

[hamster]

Hi, 

The FPGA end of the high speed FIFO is pretty well explained, but I can't find the other side - how do you access the port on the host?

It mentions the API, but looking through the API I just can't put one and one together.

 

Both of the interfaces have a software component, a Digilent Adept API, and a physical interface between the FPGA and the USB controller. Calling API functions on the PC will either present or request data on the FPGA pins according to the chosen protocol

 

I've used the old DEPP API before... and although I can find the samples and header files for the DSPI I can't see anything about DPTI in digilent.adept.sdk_2.3.1 Linux SDK.

Thanks in advance!

Mike

[JColvin]

Hi Mike,

I have sent this question off to our support team who will get back to you here on the forum.

Thanks,
JColvin

[D@n]

Hi guys,

I'm trying to work with the Nexys Video board, and I would also like to get the DPTI interface running.  I found several other posts on this topic, suggesting that the interface has not yet been released to the public.  Here are two of them:

Any news on when this library might be released?  Or, when/if it is, will it be similar to the DEPP library and interface that has already been released?

Thanks!

Dan

[jpeyron]

Hi @D@n,

Unfortunately, the engineer that would be able to best respond to your question is out this week with little to no email access. I would expect a response sometime next week. With that being said, I do see documentation with the Adept SDK demo DptiDemo that gives some instructions for the Nexys Video. The documentation is in the DptiDemoReadme file.

cheers,

Jon

[D@n]

@jpeyron,

Ok, just found the demo squirreled away within the samples directory of the ADEPT SDK distribution tar file.  It's a start.  I'll stare at it and see if I can learn anything from it.

Thanks,

Dan

[Ryan Chen]

Hi @D@n  ,

Having watched the ' Lirary Files ' within the Digilent Adept Programmer’s Reference Manual , I noticed that .dll  and .lib  both  were  mentioned . The DLL must be present for the program to load and run . However ,  in the Digilent.Adept.SDK ,I saw nothing about  .dll.  .How to get the .dll files ?Or it doesn't matter without .dll files.looking forward to your reply

[elodg]

There are two relevant docs in the Adept SDK package: Digilent Parallel Transfer Interface (DPTI).pdf and DPTI Programmer's Reference Manual.pdf
There is a sample for both FPGA and C++ in the samples folder of the same package.

Our Vivado library has a new IP called AXI DPTI: https://github.com/Digilent/vivado-library/tree/master/ip/AXI_DPTI_1.0
It pairs neatly with a demo project that has both PC software and hardware for the Nexys Video board: https://github.com/Digilent/NexysVideo/tree/master/Projects/dpti

Go have fun with it!

[D@n]

@Ryan Chen,

On Linux, shared libraries are '.so' files, whereas the non-shared ones are simply '.a' files.  Having a DLL present won't help you.  As I recall, these files are provided by the ADEPT runtime.

@elodg,

Looks like a wonderful example program!  It just ... doesn't work for my own purposes.  I'm hoping to build a similar one that is completely open sourced, but for a wishbone bus.  Hence, my questions above about the documentation for the underlying transport.  I can convert from a byte stream to a bus master easily enough, my question involves how to send/receive bytes across the interface.

For those not familiar with the wishbone, the wikipedia article about it is fairly decent, although you will need the specs to build anything that uses it.  By using the wishbone, I have access to lots of free IP cores--things that I can debug, and that won't change with the next version of Vivado.  These cores include such things as the ZipCPU (others have used OpenRISC), the 8-bit to WB master program I'm using (RTL is here), a UART, a SPI based ADC controller (sorry, I don't have I2C yet, though others might), an OLEDRGB controller (BW controller is coming), an RMII 10/100 based ethernet controller (I'm still building the 10/100/1000 RGMII controller), flash controller(s), scope(s), a direct-memory access controller, a PWM audio controller, an SD-card controller, an FPGA FM transmitter (no extra hardware required--uses GPIO pins), real-time clock, and even a GPS clock tracking core.  For those components that MUST be AXI (MIG, cough, sputter), there are bus conversion cores available.  Recently, I've been even working on a program that will build FPGA component designs (toplevel.v and one level below, together with the C header file to support accessing the design from a PC) all using a wishbone bus--sort of like the schematic editor for Xilinx/Vivado, but in this case all the details are available to someone to examine.  For those interested in the OpenRISC processor, you can find a lot of peripherals described here, and you can even run Linux on it.

And ... all of this ... is open source.  There are no proprietary drivers that you cannot debug, fix, and/or improve.  None of the drivers will break with the next update of Vivado, forcing you to rebuild your program for who knows what reason why.  Further, you will have no difficulty simulating these devices with non-Xilinx tools.  (I use Verilator myself.)

This is why I am interested in the DPTI library interface guidelines. 

Dan