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Cmod A7 settings for CFGBVS and CONFIG_VOLTAGE?


Hi folks, I'm using some very basic examples with Cmod A7, which work in the sense that they result in a behaving FPGA. However, I'm trying to get rid of, or at, least understand the various warnings.

One warning that occurs for all examples I tried is:

CFGBVS-1#1 Warning
Missing CFGBVS and CONFIG_VOLTAGE Design Properties  
Neither the CFGBVS nor CONFIG_VOLTAGE voltage property is set in the current_design.  Configuration bank voltage select (CFGBVS) must be set to VCCO or GND, and CONFIG_VOLTAGE must be set to the correct configuration voltage, in order to determine the I/O voltage support for the pins in bank 0.  It is suggested to specify these either using the 'Edit Device Properties' function in the GUI or directly in the XDC file using the following syntax: ...

OK, I see where to set them in the Tools > Edit Device Properties window, but I'm not sure what to set them to for the Cmod A7. Available values are:

  • CONFIG_VOLTAGE: 1.5, 1.8, 2.5, 3.3
  • CFGBVS (Configuration Bank Voltage Selection): GND, VCC0

... but I'm not too inclined to just experiment with different values, for fear of doing some damage. (Though somehow, the default blank settings appear to work, other than the warning message.)


  • Do these settings set something in the FPGA configuration, or do they merely inform Vivado of the hardware's design?
  • Does the specific wiring of this board impose/require only certain values for these items, or can alternatives be chosen?
  • What is/are those settings, and under what circumstances do you use them?

This appears to relate: https://www.xilinx.com/support/answers/57045.html. Also ug470_7series_Config.pdf, "Configuration Banks Voltage Select" section.

I note on the Cmod A7 schematic that:

  • CONFIG block of IC2 (FPGA):
    • Various xxx_0 inputs (ie: bank 0) are wired to 3.3V signals
    • CFGBVS_0 is externally pulled up to 3.3V
  • POWER block of IC2 shows VCCO_0 and VCCO_14 wired to 3.3V

So my guess is that the settings should be:

  • CFGBVS (Configuration Bank Voltage Selection): VCC0 (selects high range of I/O voltages)

I infer that these are actually fixed requirements of the Cmod A7, and if so, maybe they could be set in the board definition file or the default XDC file?

Thoughts? Thanks. Graham




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... and not being able to stand the suspense, I just tried out my conclusions from that last post, and indeed the following settings work with no smoke.

  • CFGBVS (Configuration Bank Voltage Selection): VCC0 (selects high range of I/O voltages)

For what it's worth, these settings end up in the xdc file:

set_property CONFIG_VOLTAGE 3.3 [current_design]
set_property CFGBVS VCCO [current_design]

... and I'm not sure why they aren't part of the default xdc that Digilent supplies. It would be interesting to know if any other values are valid, given the Cmod A7's schematic.

-- Graham

Edited by gwideman

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