Debugging the DDR3 pins?

[Azurath]

Hello!

I cannot debug the DDR3 outputs/inputs.

I get the following error message.

Bus interface connection '/mig_7series_0_DDR3' is connected to interface '/mig_7series_0/DDR3'
with VLNV xilinx.com:interface:ddrx:1.0, which is not debug-able by System ILA IP.
HDL attribute 'DEBUG' will not be set to this bus interface connection.

Could anybody help me with this?

I am going to check if my 640x480 picture is saved in the ddr3 but I have to use the ILA which does not work atm.

regards,

 

John

[D@n]

@Azurath,

Gosh, those pins run at such high speed that you will find it *very* difficult to get a trace from them.  Even worse, the DDR3 protocol isn't very simple, and so I imagine you might struggle to understand what you saw--assuming you were able to do so.

Isn't there somewhere else you can trace your design to see what is or isn't working?

Dan

[Azurath]

Yes I was actually struggling alot but I am not afraid of something just because it is complicated. Life is complicated itself, further we have Girls that are more complicated than the DDR3 algorithm itself :).

Anyhow I want to see whether the picture I stored is saved in the SDRAM DDR3 and want to debug it somehow.

My second thought is to use the UART and the processing IDE to print the picture but I don’t know any other way to confirm that the DDR3 has stored all the pixel values correctly. Is there professional ways to debug a DDR3?

Regards,

John

[xc6lx45]

One popular run-of-the-mill testing method is to alternatively write (and read) the alternating bit pattern 0x55 and 0xAA. "Hello bits, are you all there?"