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M24

help with memory mapping on Zynq

Question

hello, 

I used the zybo_hdmi_in as reference for my project. I struggled with the VDMA. After some modifications (added image sensor as input) It seems so I have my program code overlapping with the DDR memory of my frame buffer. I found that my design works once I added an offset to the DDR_0_BASEADDRess. Without the offset the VDMA gives an address encoding error. I increased the offset until it works. Now, the printf's are no longer showing...

Looking into UG585 (TRM) the VDMA is definetely within the address range

0010_0000 to 3FFF_FFFF

and there seem no overlap. Can anyone suggest me a good document where I can learn more about Zynq memory mapping, and observe problems like stack overflow etc? 

thanks

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