Jump to content
  • 0

hib

Question

I am trying to follow this tutorial:

https://reference.digilentinc.com/learn/programmable-logic/tutorials/arty-base-system-design/start 

when I run the tcl code "source ./create_project" .  I got error messages.  I changed this to"source ./create_project.tcl  " and a based system was generated. however I get no wires connecting the many blocks in the base system design.  Tthere was a message to run connection automation.  I click it and about half of the wires were connected.

How do I generate the base system design with this problematic situation?

 

Link to comment
Share on other sites

7 answers to this question

Recommended Posts

 

16 hours ago, jpeyron said:

Hi @hib,

The BSD link you posted above was made for Vivado 2015.3 and will work for Vivado 205.4 if you change the version to 2015.4 in the system.tcl found in the folder BSD\src\bd. Here is an updated BSD for the Arty that was made for Vivado 2016.4. 

thank you,

Jon

Link to comment
Share on other sites

Thanks, but I ran into problems. I deleted and reinstalled vivado to debug.  It would not allow me to complete. I will attempt to try this project if overcome the numerous difficulties posed by vivado and this BSD.

 

Howard. 

Link to comment
Share on other sites

Archived

This topic is now archived and is closed to further replies.

×
×
  • Create New...