when I run the tcl code "source ./create_project" . I got error messages. I changed this to"source ./create_project.tcl " and a based system was generated. however I get no wires connecting the many blocks in the base system design. Tthere was a message to run connection automation. I click it and about half of the wires were connected.
How do I generate the base system design with this problematic situation?
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I am trying to follow this tutorial:
https://reference.digilentinc.com/learn/programmable-logic/tutorials/arty-base-system-design/start
when I run the tcl code "source ./create_project" . I got error messages. I changed this to"source ./create_project.tcl " and a based system was generated. however I get no wires connecting the many blocks in the base system design. Tthere was a message to run connection automation. I click it and about half of the wires were connected.
How do I generate the base system design with this problematic situation?
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