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rockxito32

PmodACL I2C Zedboard -- Getting Started with Digilent Pmod IPs

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Hi everybody, thaks for your time.

I'm a new Xilinx user and I'm learning about VHDL language and FPGA. In this opportunity, I want to establish a I2C communication between Zedboard and PmodACL. I'm implementing the tutorial "Getting Started with Digilent Pmod IPs", and I have some doubts:

1) I've installed the "vivado-library-2015.4-3", but when I search the info in board section about Pmod there is nothing:

a1.thumb.png.99d2374d5540933eae641d7c8fb30c84.png

2) When I click on "Generate Bitstream" I get this error:

a2.thumb.png.e8bc313f67365b1a9d4abcfd7075d566.png

With this lines:

Running DRC as a precondition to command write_bitstream
INFO: [DRC 23-27] Running DRC with 2 threads
ERROR: [DRC 23-20] Rule violation (NSTD-1) Unspecified I/O Standard - 8 out of 146 logical ports use I/O standard (IOSTANDARD) value 'DEFAULT', instead of a user assigned specific value. This may cause I/O contention or incompatibility with the board power or connectivity affecting performance, signal integrity or in extreme cases cause damage to the device or the components to which it is connected. To correct this violation, specify all I/O standards. This design will fail to generate a bitstream unless all logical ports have a user specified I/O standard value defined. To allow bitstream creation with unspecified I/O standard values (not recommended), use this command: set_property SEVERITY {Warning} [get_drc_checks NSTD-1].  NOTE: When using the Vivado Runs infrastructure (e.g. launch_runs Tcl command), add this command to a .tcl file and add that file as a pre-hook for write_bitstream step for the implementation run. Problem ports: pmod_out_pin10_io, pmod_out_pin1_io, pmod_out_pin2_io, pmod_out_pin3_io, pmod_out_pin4_io, pmod_out_pin7_io, pmod_out_pin8_io, pmod_out_pin9_io.
ERROR: [DRC 23-20] Rule violation (UCIO-1) Unconstrained Logical Port - 8 out of 146 logical ports have no user assigned specific location constraint (LOC). This may cause I/O contention or incompatibility with the board power or connectivity affecting performance, signal integrity or in extreme cases cause damage to the device or the components to which it is connected. To correct this violation, specify all pin locations. This design will fail to generate a bitstream unless all logical ports have a user specified site LOC constraint defined.  To allow bitstream creation with unspecified pin locations (not recommended), use this command: set_property SEVERITY {Warning} [get_drc_checks UCIO-1].  NOTE: When using the Vivado Runs infrastructure (e.g. launch_runs Tcl command), add this command to a .tcl file and add that file as a pre-hook for write_bitstream step for the implementation run.  Problem ports: pmod_out_pin10_io, pmod_out_pin1_io, pmod_out_pin2_io, pmod_out_pin3_io, pmod_out_pin4_io, pmod_out_pin7_io, pmod_out_pin8_io, pmod_out_pin9_io.
WARNING: [DRC 23-20] Rule violation (BUFC-1) Input Buffer Connections - Input buffer pmod_out_pin1_iobuf/IBUF (in pmod_out_pin1_iobuf macro) has no loads. An input buffer must drive an internal load.
WARNING: [DRC 23-20] Rule violation (BUFC-1) Input Buffer Connections - Input buffer pmod_out_pin4_iobuf/IBUF (in pmod_out_pin4_iobuf macro) has no loads. An input buffer must drive an internal load.
INFO: [Vivado 12-3199] DRC finished with 2 Errors, 2 Warnings
INFO: [Vivado 12-3200] Please refer to the DRC report (report_drc) for more information.
ERROR: [Vivado 12-1345] Error(s) found during DRC. Bitgen not run.
INFO: [Common 17-83] Releasing license: Implementation
ERROR: [Common 17-39] 'write_bitstream' failed due to earlier errors.

I think it's because in the block design I could not open the Pmod corresponding to the Zedboard and then the pin assignment is not elaborated.

a3.thumb.png.f8003dee5c6d8f26c6de670e66b94ace.png

So, how can i do to import the complete library for Zedboard pmod?

Or, which is the order for Pmod pin assignment?

Bests reggards, Oscar.

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Hi @rockxito32,

There is a board file that comes with vivado for the zedboard that is made by avnet. It look like you choose that board file. I have attached a screen shoot of what your option should look like if you have the digilent board files installed correctly. Make sure you choose the zedboard that says digilentinc.com as the vendor. Then you will have the pmod ports JA,JB, JC and JD available to you. Then to add the Pmod ACl right click on the pmod port you want to use and select the Pmod ACL and it will add it to your block design connected to whichever port you chose. On your existing project you can right click on the pmod out on the Pmod ACL and select make external. I would delete the wrapper and re make it so the changes you make will be in the wrapper. Next look at the wrapper and you will see pins that are for the Pmod ACL. Next you will need to add an xdc file. I usually an empty file that is named after the board and copy paste the xdc file from here. Then you choose what pmod port you want to use and copy the pins from the wrapper to the pmod port and uncomment those lines. So if you were using JA then

#JA Pmod - Bank 13
  # ----------------------------------------------------------------------------
  set_property PACKAGE_PIN Y11 [get_ports {pin name from wrapper}]; # "JA1"
  set_property PACKAGE_PIN AA8 [get_ports {pin name from wrapper}]; # "JA10"
  set_property PACKAGE_PIN AA11 [get_ports {pin name from wrapper}]; # "JA2"
  set_property PACKAGE_PIN Y10 [get_ports {pin name from wrapper}]; # "JA3"
  set_property PACKAGE_PIN AA9 [get_ports {pin name from wrapper}]; # "JA4"
  set_property PACKAGE_PIN AB11 [get_ports {pin name from wrapper}]; # "JA7"
  set_property PACKAGE_PIN AB10 [get_ports {pin name from wrapper}]; # "JA8"
  set_property PACKAGE_PIN AB9 [get_ports {pin name from wrapper}]; # "JA9"
 

then you should be able to generate a bitstream without an issue. Also Pmod port JE is use for themio pins on the PS and will not work with the PL so you will only be able to choose from pmod ports JA,JB,JC and JD.

cheers,

Jon

 

 

zedboad_tpm3_1.jpg

zedboad_tpm3_3.jpg

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Hi @jpeyron

Thank you in advance for your help. After correcting the mistakes and doubts I had, I was able to finish the tutorial "Getting Started with Digilent Pmod IPs". These are the changes made in my project:

e1.thumb.png.ba1933f06996ca1cd59046ef95159358.pnge2.thumb.png.c87583e93c25b3ca21953efa1546acc7.pnge3.thumb.png.778dca6e0a9e9395db69ef309956185a.png

In a few days I will do the test with the Zedboard and I will send the results.

The communication done in that tutorial, is only SPI communication? Now, I have a new question: How can I do I2C communication between PmodACL and Zedboard using pmod header J2?

I could see that there is continuity between pins of the headers J1 and J2 as follow:

E4.png.930c913b94ec08d27fd2d312ce6e1122.png

If the connection is like that, I would think the configuration of the hardware in Vivado doesn't change, does it?

But, I would think the software configuration in the SDK changes, such as the assignment of I2C address and the storage registers. So, is there an example or how can I create those lines of code for I2C?

Regards,
 
Oscar

E4.png

E4.png

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Hi @rockxito32,

If you are using the pmod ports like in your block design you do not need the xdc in the project. The Pmod ACL IP core uses SPI communication so If you are wanting to use the Pmod  ACL using an I2C IP Core then you will need to Alter one of the I2C IP cores to work with the Pmod ACL like the pmod TMP3 here.

thank you,

Jon

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Hi @jpeyron happy new year,

Of Pmod ACL project I deleted the xdc, I'll do the test soon.

By other hand, for use Pmod ACL by I2C, I done  "Getting Started with Digilent Pmod IPs" tutorial for Pmod Temp3, but I have a lot of questions about how alter it for Pmod ACL:

These are the pictures of my design

 

Spoiler

 

a1.thumb.png.c4aa52a3032dd616cae70c09d2935dcd.png

a2.thumb.png.1f2ca524355cbe63b58dab1360db4030.png

a2a.thumb.png.0c05aed6f1dae6fb8912b28a9ca621c3.png

a2b.thumb.png.2b4bcf03f039bb849cff2f5dd63faff1.png

Questions:

1. The ja Pmod of Zedboard have 8 pins for signals, which of them I can choose for SDA and SCL signals? I can see that all of them are "inout" signals, Can I work with whichever?

2. After choose the pins for signals, is necessary set the "Pull type" for pullup resistors? These resistors must be 4,7K connected to Vcc of Zedboard Pmod?

In the SDK I have this:

/*************************************************************************/
/*                                                                       */
/*     main.c --     PmodTMP3 Example Projects                           */
/*                                                                       */
/*************************************************************************/
/*     Author: Arthur Brown                                              */
/*     Copyright 2016, Digilent Inc.                                     */
/*************************************************************************/
/*  Module Description:                                                  */
/*                                                                       */
/*            This file contains code for running a demonstration of the */
/*            PmodTMP3 when used with the PmodTMP3 IP core.              */
/*                                                                       */
/*************************************************************************/
/*  Revision History:                                                    */
/*                                                                       */
/*            6/9/2016(ABrown): Created                                  */
/*               5/8/2017(jPeyron): updated                                 */
/*                                                                       */
/*************************************************************************/

#include "xparameters.h"
#include "xil_cache.h"
#include "PmodTMP3.h"
#include "xil_printf.h"
#include <stdio.h>

#ifdef __MICROBLAZE__
    #include "microblaze_sleep.h"
    //(deprecated in Vivado 2016.4)
#else
    #include "sleep.h"
#endif

void DemoInitialize();
void DemoRun();
void DemoCleanup();

PmodTMP3 myDevice;

#ifdef __MICROBLAZE__
    #define CPU_CLOCK_FREQ_HZ (XPAR_CPU_CORE_CLOCK_FREQ_HZ / 1000000)
#else
    #define CPU_CLOCK_FREQ_HZ (XPAR_PS7_CORTEXA9_0_CPU_CLK_FREQ_HZ / 1000000)
#endif


int main(void)
{
    DemoInitialize();
    DemoRun();
    DemoCleanup();
    return 0;
}

void DemoInitialize()
{
#ifdef __MICROBLAZE__
#ifdef XPAR_MICROBLAZE_USE_ICACHE
    Xil_ICacheEnable();
#endif
#ifdef XPAR_MICROBLAZE_USE_DCACHE
    Xil_DCacheEnable();
#endif
#endif
    xil_printf("\x1B[H");//Move Terminal Cursor to top left
    xil_printf("\x1B[1K");//Clear Terminal
    xil_printf("Connected to PmodTMP3 Demo over UART\n\r");

    TMP3_begin(&myDevice, XPAR_PMODTMP3_0_AXI_LITE_IIC_BASEADDR, TMP3_ADDR, CPU_CLOCK_FREQ_HZ );
    xil_printf("Connected to PmodTMP3 over IIC on JB\n\r\n\r");
}

void DemoRun()
{
    double temp = 0.0;
    double temp2 = 0.0;
    double temp3 = 0.0;

    while(1) {
        temp = TMP3_getTemp(&myDevice);
        temp2 = TMP3_CtoF(temp);
        temp3 = TMP3_FtoC(temp2);
           printf("Temperature:  %.02lf  in Fahrenheit\n\r", temp2);//print double to 2 decimal places
        printf("Temperature:  %.02lf  in Celcius\n\r\n\r", temp3 );//print double to 2 decimal places
        TMP3_delay(&myDevice, 1000000);//delay
    }
}

void DemoCleanup()
{
#ifdef __MICROBLAZE__
#ifdef XPAR_MICROBLAZE_USE_ICACHE
    Xil_ICacheDisable();
#endif
#ifdef XPAR_MICROBLAZE_USE_DCACHE
    Xil_DCacheDisable();
#endif
#endif
    TMP3_end(&myDevice);
    xil_printf("PmodTMP3 Disconnected\n\r");
    xil_printf("Closing UART Connection\n\r");

}

a3.thumb.png.902a517b21825b0abe46146eeb161c56.png

a3b.thumb.png.f951012e90a7539dfc2e7bed13edf8dd.png

3. Wich lines of code I must altern for connect Pmod ACL by I2C? And this "TMP3_ADDR 0x48" is the I2C address?

a3c.thumb.png.71c9a9c9cdb5e9202000a21dadd90a05.png

4. Can I only replace the "PmodTMP3.h" by "PmodACL.h" in the main.c for use this SDK code with Pmod ACL?


 

Thanks for your help, I'll be waiting for answer.

Best regards,

Oscar

 

Edited by JColvin
made into spoiler for visual compactness

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Hi @jpeyron 

Thank you for your time. After a long time and fail tests, I done successfully the test of SPI communication between PmodACL and Zedboard, just as it is in the tutorial "Getting Started with Digilent Pmod IPs", these are some pictures:

a1.jpg.11edf5d313d7db965d046f2013564ef4.jpg

5a8ba227e698b_ConfigTerminalserialPmodACL.thumb.png.4dafbbab7be246afdb874490104812d0.png

a2.png.06fbfa13c3c5ff776d7e55042e40163f.png

By other hand, I tried to build the I2C communication between PmodACL and Zedboard but when debugging the SDK code, it's keeps in a while of a register that I don't know how change it:

error.thumb.png.1270b26042e7c69a3c15aada7e5e5443.png

This is my full project created in Vivado 2015.4:

https://we.tl/v8XpXoyKvH

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Hi @rockxito32,

Sorry for the late response i have not had a lot of time to trouble shoot projects.I do not think you should be altering xilinxs I2C process.  Can you attach the .h, .c and the main sdk code? 

thank you,

Jon

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