Jump to content

Using MultiSIM PLD Design with BASYS2


mjh5363@psu.edu

Recommended Posts

Does anyone use MultiSIM to program BASYS2? I teach an intro digital course that uses MultiSIM PLD Design to schematically program BASYS2 fpgas. I get a message when using ADEPT to upload that states: "Startup clock for this file is 'CCLK' instead of 'JTAG CLK.' Problems will likely occur. Associate config file with device anyway?" I can change this in Xilinx, but can't seem to in MultiSIM PLD. Any thoughts?

Link to comment
Share on other sites

Archived

This topic is now archived and is closed to further replies.

×
×
  • Create New...