We are having trouble with our XADC on the nexys video board. We have a DDR3 design that has a XADC instantiated with convert frequency set to the requirements of the DDR3 MIG.
The 12 bit temp output of the XADC is routed to the MIG. Our issue is that we always get zero output from the XADC temp vector. We have simulated the design using the verilog code from the Xilinx ug480_7Series_XADC document. In simulation we see drdy response from the XADC, but the data is always zero. It is set in the simulation text file to 63 C. Another funny thing is that we never see the EOC or EOS signals going high?
Does anyone have a project where you use the temp sensor read-out from the XADC with a DDR3 project. This is an Artix-7 part.
The cool thing is that with your help (Dan, especially), we have a number of DDR3 designs working ( THANK YOU ).
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boyerkg
Hi All,
We are having trouble with our XADC on the nexys video board. We have a DDR3 design that has a XADC instantiated with convert frequency set to the requirements of the DDR3 MIG.
The 12 bit temp output of the XADC is routed to the MIG. Our issue is that we always get zero output from the XADC temp vector. We have simulated the design using the verilog code from the Xilinx ug480_7Series_XADC document. In simulation we see drdy response from the XADC, but the data is always zero. It is set in the simulation text file to 63 C. Another funny thing is that we never see the EOC or EOS signals going high?
Does anyone have a project where you use the temp sensor read-out from the XADC with a DDR3 project. This is an Artix-7 part.
The cool thing is that with your help (Dan, especially), we have a number of DDR3 designs working ( THANK YOU ).
Regards,
Keith
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