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Anvyl Spartan-6 FPGA Trainer Board


amkichu

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On 12/1/2017 at 8:16 PM, jpeyron said:

Hopefully this will help you with your project.

Thanks @jpeyron

It helped a lot for me. I have the task list like this. I will send 1 at first, then 2, then 3 and I have a switch that executes based on the received data. I have my customized code for nios2_socket_server example like:

Quote

 

while (conn->rx_wr_pos < conn->rx_rd_pos);

    // commands are separated by new lines. Get rid of them.
    c = (char) *conn->rx_rd_pos++;

    Nr = c - '0'; 

    //printf2("Menu number %i - ", Nr);

    switch (Nr)

 

 

Can I get the echo code modified like this flow (void SSS_exec_command(SSSConn* conn) function) as I am not an expert in C programming?

niosII_simple_socket_server.c

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49 minutes ago, jpeyron said:

what is the difference between these two approaches

My question was: why there was a need for serial port connection to establish before an ethernet connection to be verified via Telnet in the first approach though it worked well with the latter?

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Hi @amkichu,

I not sure exactly what you are asking "what is the difference between these two approaches". I know that Putty can use different hardware on the PC. Putty can communicate through the ethernet as well as the usb uart. Ethernet is a more complicated communication to set up that can move large amounts of data at high speeds. UART is a less complicated communication type to set up that is not typically used with transferring large amounts of data and is much slower then ethernet.  It depends on your needs/ability as to which communication type is right for you. I would suggest to look here and here for more specific information about ethernet and uart communication.

thank you,

Jon

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Curious to ask, What will happen to 10.Anvyl_Ethernet_Demo.zip without UART? Now we are establishing Serial Port connection (first putty) and then using Telnet (second putty) to check ethernet connection. I deleted the UART instance in XPS and tested the ethernet connection establishing Telnet connection using only one Putty? What is the difference between these two approaches?

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@elodg

Thanks for your reply!

I tried with Antivirus (Avira) turning off and other networks (Wi-Fi) and doing the same by generating new bsp and project. Fortunately, it is successful and I could open it up with telnet also. I repeat the whole with turning on the antivirus and Wi-Fi, but it gives the below result. Thanks for your support. I guess that the regenerating of bsp and project made it right. Thanks again. If I am not wrong I think I need to modify echo.c for adapting the code for my own applications.

image.png.d5b95cda9ff603326ee438acc5c28797.png

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19 hours ago, elodg said:

Does the lwip server bind successfully to the IP

I tried binding in three ways:

1. Attaching ELF in Microblaze through EDK and downloading bitstream.

2. Downloading bitstream without ELF file in EDK and Program FPGA in SDK.

3. I had another attempt as per Anvyl_demo_doc.pdf. After programming the bitstream without ELF file and then issuing the command connect mb mdm via XMD , it gives the following error in connectmbmdm.jpg. By running "xdisconnect -cable" and starting over again gives the same error.

Is there any other way to check for the binding?

20 hours ago, elodg said:

See what the terminal says on the USB/UART port of the Anvyl

By selecting the COM4 (from Device manager) port and the following settings (from Anvyl_demo_doc.pdf), Putty is never getting connected to the FPGA board. I tried with a simple hello world display also.
a. Baud rate: 115200
b. Parity: none
c. Data bit: 8
d. Flow control: none
e. Stop: 1 bit

connectmbmdm.JPG

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Dear @elodg

Thanks to the attached upgraded project of ethernet demo and it compiled well in EDK (XPS) and in SDK (ISE 14.7). I will brief how I proceeded with the project and what problems I faced?   

I started with Run DRCs in EDK and then to Generate Netlist.  After obtaining XST Completed with no errors with a few warnings, I proceeded to Generate Bitstream.

After completing the Generate Bitstream with no errors, I proceeded to Export Design & Launch SDK. I regenerated the whole BSP and project. The elf is well generated and I added the generated elf file to Imp Executable of Microblaze in EDK (XPS).

tjjQoenMUcgMv-hMRrQMv8xOe_OiUQJpIIiZqIJJL6NKbnQcR3-ipI0V6DXdlB3UP49uE5WZ6Et_mpNZh1LREtXjlP0LMpmlzsYKBUyTePuFsUsOaChakfQ92A6Jm7Kq0nBcFm1l

 

Then, I Update Bitstream so that elf and bit files are linked and Download Bitstream to the FPGA. I configured the IPV4 settings on my laptop to the following as per the Anvyl_demo_doc.pdf. As per main.c, IP address of the FPGA is 192.168.1.10.


5wlg_OPwtWQ-H6b2ciRB-u5Z0I48TwYGqyr7TmCKXh2jbyEGDm-GyNRDYpwZ23UQIrcdTI_NA0Ahjrr4DtI2QzwKEVYfXaqklXXF4CXqTQ35jb0-KSG-77hsK6GpzQAg-kiz7HbT

Opening XMD and executing ping 192.168.1.10, I got like below.

dVEDIbH8nWHRc1hNCedFqBa6lTDrP20leUpi6yAKGN6przQ5ktjin2OZ_JgUZXd1zPa8hlyjxmuSFSPOmd4F3u3dUwyeBb1aHMNdtZuwqHdQTxoZrtzJPezbYm5v5kVzjnt3Dm4Z

also tried the other way also. Download Bitstream without attaching an elf file and then Program FPGA after building the project in SDK. But the result remains same. Also, I tried pinging from Command Prompt and obtained the same result but with 100% loss.

I expect a reply from 192.168.1.10 if the project is compiled or the configuration is in the correct way. Please help me in finding where I made a trouble and how to rectify it.

Thanks in advance

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What are you talking about? I opened 10.Anvyl_Ethernet_Demo in XPS 14.7, and upgraded the project to the latest version along with IPs. There are no IPs missing, but there is an error message upon bitstream generation that is answered here: https://www.xilinx.com/support/answers/62380.html

Just double-click on axi_ethernetlite_0 and uncheck Include PHY I/O constraints, as described in the AR. Then, the bitstream gets generated successfully.

Exporting to SDK works, but BSP needs to be regenerated to upgrade to the latest library version. Then the application compiles as well. I don't have a board at hand, but you can try it yourself using the upgraded project I attached.

10.Anvyl_Ethernet_Demo.zip

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15 hours ago, jpeyron said:

Hi @amkichu,

The only thing I have been able to find is Here is the Anvyl Demo Project Suite. I have reached out to my co-works to see if we have an OOB demo that contains all peripheral interfacing.

thank you,

Jon

 

Thanks, @jpeyron for your reply!

Can I get a working version of the project Ethernet connection also? Both 10.Anvyl_Ethernet_Demo and 11.Anvyl_LWIP_Demo are not working in XPS 14.7 (ISE Design Suite 14.7) where some of the IPs in these demo files are removed by Xilinx, so a connection cannot be established.

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