I've been trying to get the Zybo Z7-10 HDMI demo (link) to run on my board, but I can't seem to be able to compile the actual project (using Vivado 2017.3 on Windows 10). I created the project from the create_project.tcl script in the proj folder, and was able to generate the block diagram and wrapper. I upgraded the IP cores and verified that the xdc file was consistent with the wrapper. But when I try to generate a bistream, Vivado always seems to get stuck on route_design. I've left Vivado running for 4 hours and it still can't move past route_design, despite it still using ~30% of my CPU. From thesetwo forum posts, could it be a version problem? I don't seem to have a system.tcl file in my project.
I've been able to run the demo on my board by loading the provided bitstream and running the example code, but I would like to modify the demo and use it as a starting point for my project.
Question
aytli
I've been trying to get the Zybo Z7-10 HDMI demo (link) to run on my board, but I can't seem to be able to compile the actual project (using Vivado 2017.3 on Windows 10). I created the project from the create_project.tcl script in the proj folder, and was able to generate the block diagram and wrapper. I upgraded the IP cores and verified that the xdc file was consistent with the wrapper. But when I try to generate a bistream, Vivado always seems to get stuck on route_design. I've left Vivado running for 4 hours and it still can't move past route_design, despite it still using ~30% of my CPU. From these two forum posts, could it be a version problem? I don't seem to have a system.tcl file in my project.
I've been able to run the demo on my board by loading the provided bitstream and running the example code, but I would like to modify the demo and use it as a starting point for my project.
Link to comment
Share on other sites
7 answers to this question
Recommended Posts
Archived
This topic is now archived and is closed to further replies.