accessing one array element on Nexys4

[ntm]

I'm working on what should be a simple 7-segment display driver for the Nexys4DDR.  Right now I've got a module that should transfer a 9:0 one-hot encoding to 7-segment display digits.  I'm using the Nexys4's switches to simulate the 1-hot and the AN[0] display digit to check the module.  So far as I can tell Vivado refuses to let me hard-code the value 1'b0 to AN[0].  This seems odd.  I either get the "an0 doesn't have a real value and you're about the smoke the board" error from write bitstream, and also sometimes complaints about accessing a single array element (ie, working with just AN[0]).  

Restating, (the pin is enabled in the xdc) why doesn't this line work?

assign AN[0] = 1'b0;

Here's my work-around.  I don't love this solution.
 

module onehot_to_7seg(
input [9:0] d,    // this is the one-hot decimal digit
output la,  // these are the actual LED digits, la = segment a
output lb,
output lc,
output ld,
output le,
output lf,
output lg
);

wire d0,d1,d2,d3, d4,d5,d6,d7, d8,d9;
assign d0=d[0];
assign d1=d[1];
assign d2=d[2];
assign d3=d[3];
assign d4=d[4];
assign d5=d[5];
assign d6=d[6];
assign d7=d[7];
assign d8=d[8];
assign d9=d[9];

// based on the one-hot value, the segment "a" will sometimes light.  Specifically
// when d = 0,2,3,5,6,7,8, or 9
assign la = d0|d2|d3|d5|d6|d7|d8|d9;

assign lb = d0|d1|d2|d3|d4|d7|d8|d9;

assign lc = d0|d1|d3|d4|d5|d6|d7|d8|d9;

assign ld = d0|d2|d3|d5|d6|d8;

assign le = d0|d2|d6|d8;

assign lf = d0|d4|d5|d6|d8|d9;

assign lg = d2|d3|d4|d5|d6|d8|d9;

endmodule

// this is just a basic test module to see if I can get the 7-seg display to run.  
module test_1hot_to_7seg(
    input [10:0] SW, //[10] is to enable the 7-segment, [9:0] are to encode the 1-hot
    output CA,
    output CB,
    output CC,
    output CD,
    output CE,
    output CF,
    output CG,
    output [7:0] AN
);
    assign AN[0]=SW[10];
    assign AN[1]=~SW[10]; 
    assign AN[2]=~SW[10];
    assign AN[3]=~SW[10];
    assign AN[4]=~SW[10];
    assign AN[5]=~SW[10];
    assign AN[6]=~SW[10];   
    assign AN[7]=~SW[10];
    
# I should be able to say something like 
#	AN=8'b0111_1111;
# or
# 	AN[0]=1'b0;
# or is this forbidden?

    onehot_to_7seg test1 (SW[9:0], CA, CB, CC, CD, CE, CF, CG);
    
endmodule

 

[D@n]

@ntm

assign AN = 8'h7f;

is a type of statement I use often.  It's not forbidden, it's the way to go.

Looks like your not declaring your outputs to be either registers or wires.  Vivado can do some strange things with undeclared (or misspelled) variables.

Try adding the line "`default_nettype none" at the top of your design.  This will turn any undeclared registers or nets into errors.  You'll then wan to replace your "input" lines with "input wire" and your output lines with either "output wire" or "output reg" as appropriate.

I'm also interested in that error, "an0 doesn't have a real value and you're about the smoke the board".  I'm not sure I've seen that one before.  Could you post the actual wording?  If that's it, then I will need to spend some time laughing.

Dan