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Arash

NetFPGA SUME +FMC

Question

Hi;

I'm trying to connect High Tech Global "4-Port SATA / 4-Port SFP+ FMC Module (Vita57.1) " to NetFPGA SUME  to use 4 X SFP+ via FMC.
 
I connected this FMC module to different FPGA boards and it works fine, but it doesn't work with NetFPGA SUME. 
I used different implementations such as:
  • I used NetFPGA SUME nic_reference design and changed the constraints based on the fmc_gtwizard constraints file to connect to the FMC module. The modified nic-efrence design is failed to pass the tests and it doesn't receive any packet for all 4 ports.
  • I tried the NetFPGA SUME fmc_gtwizard design . The track_data_out_i signal in ILA for the lines is constantly '0' which indicates  that valid data isn't received on the RX side.
  • I tried different options such as lower frequency rate and it doesn't work.
 
Do you have any recorded experience like mine?  Could you please advise me what is the issue might be?
 
Best regards;
Arash

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Hi @Arash,

It sounds like you are registered with the NetFPGA forum here. I would suggest to post your question on the NetFPGA forum. Unfortunately, I do not have any experience with the NetFPGA Sume so would not be helpful for your situation. 

thank you,

Jon

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13 hours ago, jpeyron said:

Hi @Arash,

It sounds like you are registered with the NetFPGA forum here. I would suggest to post your question on the NetFPGA forum. Unfortunately, I do not have any experience with the NetFPGA Sume so would not be helpful for your situation. 

thank you,

Jon

Hi @jpeyron

Thanks for your message;

I'm registered with the NetFPGA forum. I sent an e-mail to NetFPGA SUME email list last month. I'm afraid I did not receive any proper reply to solve the issue.

One of the NetFPGA team member advised me to open a support case with Digilent and request RMA.

 

Best regards;

Arash

 

@jpeyron

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Hi @Arash,

We have reached out to our more NetFPGA Sume experience engineer for input on this issue. Unfortunately, they are out of the office this week. You should expect a response to this issue next week. Also we noticed that you had posted about this issue here as well.  In the xilinx forum you mention "I have several NetFPGA SUME boards and I tried all of them, the results are more or less the same.". So we better understand the situation. You have tried to get the altered project to work with the FMC on multiple NetFPGA Sumes?

cheers,

Jon

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15 hours ago, jpeyron said:

Hi @Arash,

We have reached out to our more NetFPGA Sume experience engineer for input on this issue. Unfortunately, they are out of the office this week. You should expect a response to this issue next week. Also we noticed that you had posted about this issue here as well.  In the xilinx forum you mention "I have several NetFPGA SUME boards and I tried all of them, the results are more or less the same.". So we better understand the situation. You have tried to get the altered project to work with the FMC on multiple NetFPGA Sumes?

cheers,

Jon

Hi @jpeyron

I use Xilinx GTH IPcore , export the Xiinx example design , and modify the constraints for example design. Then I implement the design. I only use 1 netFPGA SUME and using loopback test.

Best regards;

Arash

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Hi @Arash,

While we are waiting for our more NetFPGA Sume experience engineer to be back in the office I was wondering if you had used the loopback test without altering it successfully on your NetFPGA Sume? Also, I wanted to clarify my earlier question. I  was wondering if you had tried using the altered project with different NetFPGA boards since you had mentioned having multiple NetFPGA Sume's in your Xilinx post. 

thank you,

Jon

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Hi @jpeyron

I used different designs to test. One of the designs is the original nf_sume_fmc_gtwizard_example. This design is available in acceptance test of the NetFPGA SUME projects. In this test I used exactly the nf_sume_fmc_gtwizard_example.  

Yes,I mentioned I have more than one boards. I checked the design with several NetFPGA SUME boards in case. The results are the same.

I don't think the problem is the FMC card or  NetFPGA SUME FMC. I need to find the problem.

Best regards;

Arash

 

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Hi @Arash,

Just checking in to let you know that we have not forgotten about your post. I know that our NetFPGA engineer is still getting caught up from been out of office last week.

cheers,

Jon 

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20 hours ago, jpeyron said:

Hi @Arash,

Just checking in to let you know that we have not forgotten about your post. I know that our NetFPGA engineer is still getting caught up from been out of office last week.

cheers,

Jon 

@jpeyron Thank you 

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Unfortunately I cannot verify if that product is designed in a way that will work with the SUME. We don't support the use of third party FMC mezzanine cards. Often they will work as long as the card can operate at 1.8V and doesn't use any pins that are not connected on the SUME. It is left up to you to get your software working.

If I had to bet, I would guess the netFPGA example isn't working because of a clocking issue. If you are using the GBT clocks coming from your card instead of the onboard clock, use an oscilliscope to ensure they are operating at the same frequency. If you are using the onboard clocks, you might need to use the ones coming from the card due to routing concerns, but I am not positive on this.

I am asking our test team of a good method to get your FMC connector fully tested in the field, so we can ensure this is not due to a defective SUME.

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On 08/11/2017 at 12:49 AM, sbobrowicz said:

Unfortunately I cannot verify if that product is designed in a way that will work with the SUME. We don't support the use of third party FMC mezzanine cards. Often they will work as long as the card can operate at 1.8V and doesn't use any pins that are not connected on the SUME. It is left up to you to get your software working.

If I had to bet, I would guess the netFPGA example isn't working because of a clocking issue. If you are using the GBT clocks coming from your card instead of the onboard clock, use an oscilliscope to ensure they are operating at the same frequency. If you are using the onboard clocks, you might need to use the ones coming from the card due to routing concerns, but I am not positive on this.

I am asking our test team of a good method to get your FMC connector fully tested in the field, so we can ensure this is not due to a defective SUME.

Hi;

Thanks for your message. The card operates at 1.8 V and I tried this card with different FPGA boards. The card works fine with other FPGA boards, but not the SUME.

I use the card clock. I measured the card clock frequency with an oscilloscope and it works fine at the expected frequency. 

Please let me know the result of your test in the field.

Best regards;

Arash

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Hi @Arash,

If you think there is a problem with the SUME board we would be more than happy to discuss steps on validating the board. If you think this is a design issue I would suggest to reach out again to the NetFPGA Sume forum where there is more dedicated support for the NetFPGA Sume.

thank you,

Jon

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10 hours ago, jpeyron said:

Hi @Arash,

If you think there is a problem with the SUME board we would be more than happy to discuss steps on validating the board. If you think this is a design issue I would suggest to reach out again to the NetFPGA Sume forum where there is more dedicated support for the NetFPGA Sume.

thank you,

Jon

Hi @jpeyron;

Thanks for your message.

I tried different designs and I think the issue is the SUME board. One of the designs I troed is NetFPGA SUME fmc_gtwizard.

I shared this with NetFPGA SUME fourm via e-mail , but I didn't receive any answer to solve the issue. One of the NetFPGA SUME team member suggested me to open a support case with Digilent and request RMA.

Best regards;

Arash

 

 

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