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Zybo or Zybo-Z7 for MIPI CSI-2 experimentation?


Max_van_Daalen

Question

Hi all,

I have a Zybo and have been using it successfully for a variety of HDMI / VGA video projects.

I'd like to have a go at interfacing a Raspberry Pi V2 camera. I understand that I need to implement a MIPI CSI-2 receiver in VHDL and I have a reasonable idea of how to proceed. This may take a bit of effort, but that's part of the fun!

However, what I'm not sure about is whether I can specify the appropriate 1.2v IO Standard that's required on the Zybo board via the high speed PMOD ports?

Or, will I need to buy one of the newer Zybo-Z7 boards?

I realise that the newer Zybo-Z7 boards have a 2 lane MIPI connector (which is very convenient), so I'm assuming that the connected Zynq pins can run in the appropriate 1.2v differential IO Standard. But for this to work does the newer Zybo-Z7 have a specific 1.2v VCC supply to facilitate this? (that perhaps the Zybo doesn't have)

I will probably upgrade to the newer board anyway, but would like to understand if this is possible on the older Zybo.

Many thanks!

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Since posting my question, I've come to realise that implementing the "electrical" MIPI interface is a bit more involved than I first realised. Having studied the schematic for the Zybo-Z7 I can that the guidelines suggested in the following Xilinx application note have been implemented.

https://www.xilinx.com/support/documentation/application_notes/xapp894-d-phy-solutions.pdf

I'm still not clear as to whether or not the Zybo's IO blocks/banks are wired in such a way to allow me to do this via the PMODs. However, to keep life simple I think I'll buy a Z7 and experiment with my 2-lane Raspberry Pi v2 camera.

I'd still appreciate any comments from anyone that knows about this.

Cheers!

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Hi @jpeyron, thanks for the reply!

I've continued to investigate this and as far as I can tell the Raspberry Pi v2 camera uses the "high speed" version of D-PHY and from the Zilinx app note it looks as if I can use the LVDS_25 IO Standard. This also corresponds to the equivalent configuration in the XDC file for the Z7 boards.

I did also notice that the Vcco pins on both old and new Zybo boards were all fixed at 3v3, but perhaps this doesn't matter when the LVDS IOs are being used as inputs, not completely sure on this (although I did also see a forum post elsewhere reporting an attempt to do something similar with a reasonable degree of success).

So I reckon / hope that I can use Pmod JD on the original Zybo. I selected JD as it's the only Pmod with a set of SRCC differential clock pins, which I would use for the CSI-2 clock lane. I would also need to use a second Pmod, but only for the "cam clock" and "cam gpio" signals. I was planning to make up an adaptor PCB / custom PMod.

Looking forward to reading what find out about the CSI-2 receiver.

I'm based in the UK and annoyingly none of the distributors here have yet stocked up on the new Z7 boards. I will buy one, possible imported from Digilent directly, but in the mean time I'd like to have a go with my trusty Zybo (if it's possible).

Thanks again for you help!

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Hi Max,

I worked with MIPI cameras and have done some work in the MIPI area. 

MIPI is a composite signal that has LP signals that trigger the state machine and an HS (high speed) transmission. in the HS mode, it becomes a differential pair 100 ohm. the way it works is that the LP state will signal the receiver to go into HS mode. typically, on any one of the lanes (1 clock and 4 data or more) you need a CMOS line to control the termination and 2 Diff pair. when in LP state, you do not want the termination in place. so this makes things complex.  

If you are going to make an adapter, I think you should look at the Meticom ICs. Here is a link: http://www.meticom.com/page2/page17/MC20901.html with this device, you can use standard FPGA inputs without worrying about the termination. However, you still need a MIPI core logic and that is VERY expensive. 

You have to be very careful about voltages, MIPI side on the composite signal, LP is 1.2V and HS is 200mV common mode and 400mV differential swing. 

Hope this helps. Good luck. 

S

 

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Hi Sagi,

 

Many thanks for the answer, it's very helpful and I will definitely take a look at that part.

This project is already and will continue to be a voyage of discovery. With respect to the IP core, my plan was to try and have a go at implementing one based on the open source VHDL at the link below.

https://github.com/daveshah1/CSI2Rx

I've not started yet with any implementation as I'm still at the stage where I'm figuring stuff out.

As the Zybo-Z7 now has a MIPI interface, I hope there'll be a few more examples to look at in the future. If I succeed in getting something that works, I'll definitely publish it up at GitHub for others to play. It's a shame that MIPI is a "closed" standard.

Cheers,

   ...Max

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Hi Max,

The link is very helpful and it is interesting because one of the cameras I have is the OV13850 that this person used. And to find someone make the MIPI core is even more impressive. not something I would attempt. 

Though the project is very impressive, you need to keep in mind that the MIPI consortium keeps close tabs on what is out there. It is a closed standard and you have to pay to get it. this makes it hard for people to implement great things. 

I think but not sure, that the Zynq MIPI core has a cost associated with it? I don't think Xilinx let you use it for free? 

Thanks

Sagi

   

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Hi Sagi,

I also have an OV13850, although for my first attempt I'll be targeting the Raspberry Pi camera (v2 with the Sony IMX219 part) as the newer Zybo-Z7 has an appropriate connector and the Xilinx recommended termination (as linked to in my second post, worth a look if you've not seen it).

This project is purely personal, I would be nice to have a copy of the spec, perhaps one day I'll get to see it as part of a commercial project. Having said that, I've now read so many posts and seen a number of other open source implementations that many of the details are out there, but in a very diffuse sense.

The latest version of Vivado (2017.3) does include the MIPI core, but you need a license to be able to instantiate an instance (I've not tried, but I believe you can get a 30 day evaluation for free). I do find it interesting that Digilent have included a MIPI port / interface on the new Zybo, especially considering the closed nature of MIPI. I suspect that the new Zybo will trigger a few more open source examples, perhaps mine will be one of them if I can get it going.

Cheers,

   ...Max

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That's interesting, thanks for pointing it out!

I did wonder if this would happen, I'm keen to see how it works.

I did eventually manage to get most of my own implementation working with the Raspberry Pi camera, it has a few annoying bugs and loose ends which I really must make some time to sort out. Once it's fully working I'll upload it to GitHub and post a link.

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On 10/13/2017 at 9:20 AM, Max_van_Daalen said:

Since posting my question, I've come to realise that implementing the "electrical" MIPI interface is a bit more involved than I first realised. Having studied the schematic for the Zybo-Z7 I can that the guidelines suggested in the following Xilinx application note have been implemented.

https://www.xilinx.com/support/documentation/application_notes/xapp894-d-phy-solutions.pdf

I'm still not clear as to whether or not the Zybo's IO blocks/banks are wired in such a way to allow me to do this via the PMODs. However, to keep life simple I think I'll buy a Z7 and experiment with my 2-lane Raspberry Pi v2 camera.

I'd still appreciate any comments from anyone that knows about this.

Cheers!

The I/O lines of all the Zybo's "high speed" PMODs (JB thru JD) have their protection bridges shorted to 0 ohms and adjacent I/Os routed in paired format with the intention they are used for high speed differential signalling.

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This is interesting...

There was one simple question: Whether inputs can be configured to a lower voltage even though the IO bank is driven from a higher voltage.
I've done that successfully with MIPI RFFE on Spartan 6. So yes, I guess it works for single-ended signals, at least in ISE (by setting the IO standard to LVCMOS18 in my application). Later, found the FMC Carrier S6 board, which has FPGA-selectable IO voltages. But that's history.

But D-PHY to RFFE is like jet fighter to paper plane.. Back then, we did some studies of driving another D-PHY based standard straight from an FPGA, and concluded that it isn't possible without additional mixed signal circuitry aka "PHY chip", for "electrical" reasons suspiciously similar to the ones stated above.

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Hmmm...

Don't want to discourage anyone but I'd look for an FPGA board with a CSI-2 MIPI interface. Of course if Digilent offers something that it supports then why not use that?

There is an alternative for users of boards with an FMC connector. Terasic makes an FMC mezzanine board that has just what you are looking for including a camera; the D8M_FMC. It appears to have an LPC connector and should be compatible with the Nexys Video, Genesys2, or Zedboard. I haven't traced out all of the signals however so anyone interested needs to do their homework before throwing their money at a solution.

I realize that this doesn't help you use your Rasperry Pi camera module but perhaps the information is helpful to someone out there....

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