No serial port when connecting to shared JTAG/UART USB

[clara.daia]

Hello,

I have a 7Z010 Zybo, with a single usb interface that, as far as I understand it, should serve both for programming the device and communicating via UART. I cannot seem to connect to the UART.

I'm using Vivado 2017.2 in Antergos distro. I have installed the digilent-adept-utilities and digilent-adept-runtime packages from AUR repository, and the cable drivers by running the "install_drivers" script in the Vivado installation directory.

"djtgcfg enum" correctly identifies the board. However, I read in many different places that two devices should appear on /dev, "ttyusb0" and "ttyusb1" or some other variation with usb, but that does not happen when I connect the board. I tried changing the source jumper position, in case I'd misplaced it, but nothing changed.

I also read that "lsusb" should show two device names, one starting with "Future Techonologies...", and another with "Cypress...". I only get the first one.

The resulting problem is that while trying to run the Hello World program (with Processing System), in order to display the message, I must configure the correct serial port, but I have no idea what that would be.

Should I look for other cable drivers or packages? What else could it be?

[jpeyron]

Hi @clara.daia,

Here is a forum thread that deals with using a serial terminal in linux. When I first made was using my ubuntu 16.04 VM I had issues communicating to a serial terminal. So first i made sure i was part of the dailout group  

sudo adduser $USER dialout

then I

sudo apt-get install screen

then I'n my case I needed to use ttyUSB1

look in dev to see if ttyusb0 or ttyusb1 is available?

To start the serial terminal the command i used was:

screen /dev/ttyUSB1 115200

cheers,

Jon

 

[clara.daia]

Hello @jpeyron,

Thanks a lot for that. Because I'm using Antergos (ArchLinux derived), I had to add my user to the 'uucp' group instead of 'dialout'. After that, the '/dev/ttyUSB1' device appears.

However, I still cannot get any output. I installed screen and ran it as you instructed, but nothing happened. I also tried using the SDK terminal and got "Nothing found at port: ttyUSB1". I tried minicom too, with no success.

I ran

dmesg | grep tty

and the result is:
 

[ 7630.382461] usb 1-5: FTDI USB Serial Device converter now attached to ttyUSB0
[ 7630.385327] usb 1-5: FTDI USB Serial Device converter now attached to ttyUSB1
[ 7630.394182] ftdi_sio ttyUSB0: FTDI USB Serial Device converter now disconnected from ttyUSB0

I googled some more and found some people had trouble with USB Serial adapters because of brltty. I found I had it and uninstalled it, reloaded the udev rules and reconnected the cable, but the output was the same for dmesg, and still no output from the screen terminal.

I wonder if that last line is related to the Xilinx driver recognizing the JTAG port as "not serial" or something like that? Do you have any further advice?

[jpeyron]

Hi @clara.daiam

Have tried using ttyUSB0? Unfortunately, I am not familiar with Antergos. If you have not seen this Here is a link to Working with the serial console in archlinux.

thank you,

Jon

[clara.daia]

Hello, @jpeyron. Thanks again for taking the time to help me.

It seems I did not have the correct driver for the USB-Serial bridge. After I installed another one, the SDK console displays "Connected to /dev/ttyUSB1 at 115200". Unfortunately, I still don't get any output.

I added a couple breakpoints to the code, but it did not seem to work - I do not know what exactly these breakpoints should trigger, but nothing happened at all. I also noticed two things:

• tx and rx LEDs on the board do not flash at all when I launch the program from the SDK (I turned off the lights to check, but it might be too fast to be visible, I don't know)
• there is a message "missing" from my SDK log. Mine goes

23:07:00 INFO    : FPGA configured successfully with bitstream "/home/clara/setting_up_ZPS/setting_up_ZPS.sdk/design_1_wrapper_hw_platform_0/design_1_wrapper.bit"
23:09:21 INFO    : ps7_cortexa9_0 Processor is in use. Please stop existing Run or Debug sessions before launching.
23:09:24 INFO    : System reset is completed.
23:09:26 INFO    : FPGA configured successfully with bitstream "/home/clara/setting_up_ZPS/setting_up_ZPS.sdk/design_1_wrapper_hw_platform_0/design_1_wrapper.bit"
23:09:26 INFO    : ps7_init is completed.

While the screenshot from the tutorial I was following shows an additional message "PS Initialization is complete" after "ps7_init is completed". I had assumed this should come from the fact that I'm using a newer version of Vivado, but now I'm suspecting the program is not running at all.

Any more ideas?
 

[jpeyron]

Hi @clara.daia,

Could you try using our Getting started with Zynq which also uses leds/switches/buttons and the uart. Are you using the serial terminal on sdk? Have you tried one of the other serial terminals like screen?

cheers,

Jon

[clara.daia]

This is precisely what I tried to do on Monday after my failed attempt with the other tutorial. I cannot seem to do any of them right, though.

I instantiated both AXI GPIO components, but got stuck at the 4.2 step: when I select any of the interfaces in the automation window, the "Options" section is empty. Maybe you can help me with this one?

[Notarobot]

@clara.daia

From my personal experience Linux requires a number of configuration tweaks for making Vivado functional.

It might help to review attached summary of tweaks for Ubuntu 16 implemented when I installed Vivado 2016.4. It works for me. Don't take it verbatim, use what's necessary.

You can save time using proven/supported Linux distro on a virtual machine if your version is missing something.

Linux_fixes.txt

[D@n]

@Notarobot,

Wow!  That's a lot of tweaks.  I don't recall needing to do half that many tweaks, but I do know that I need to source the settings file(s) before I can run Vivado.

Dan

[clara.daia]

Hello,

First, thank you @Notarobot for the Linux fixes. I did not manage to run them all in Antergos, but the library symlinks actually allowed me to find out the processor gets into an infinite loop, without ever entering my main(). I decided it`s too much pain to try and run this on Linux, and have installed Vivado from scratch into Windows.

Second, about the Digilent tutorial I was following, also mentioned by @jpeyron, I had made a silly mistake - I had selected only the "part" (the FPGA model code) on the project settings. That`s why there were no board interfaces to choose from in the Connection Automation step. I downloaded the board files and selected the correct one for the project settings, now I have all the right interfaces to choose from.

I`m not sure how to mark this question as closed.