I'm using the sync mode, triggered by the pattern generator. My config is one 14 bit counter (DIO24-DIO37), and a clock on a single signal (DIO38). The logic analyzer is configured to sample DIN0-DIN7 on the rising flank of DIO20 (which I connected to DIO38). But I'm missing the first 8 samples. How do I know? The device-under-test is a ROM and I already know its contents. I actually get the correct values when the counter on the pattern generator wrap around and starts again. I verified with a scope that the generated pattern is correct (so the sample clock starts at the correct time). Is this a bug in WaveForms or do I need to configure some special?
(On that note: it would be nice when I could restrict the pattern generator to one single run on the counter instead of being time-based)
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hlipka
I'm using the sync mode, triggered by the pattern generator. My config is one 14 bit counter (DIO24-DIO37), and a clock on a single signal (DIO38). The logic analyzer is configured to sample DIN0-DIN7 on the rising flank of DIO20 (which I connected to DIO38). But I'm missing the first 8 samples. How do I know? The device-under-test is a ROM and I already know its contents. I actually get the correct values when the counter on the pattern generator wrap around and starts again. I verified with a scope that the generated pattern is correct (so the sample clock starts at the correct time). Is this a bug in WaveForms or do I need to configure some special?
(On that note: it would be nice when I could restrict the pattern generator to one single run on the counter instead of being time-based)
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