Question

hello,

I want to interface zedboard(PL-Section) with external ad7768-4 ADC board using SPI interface via FMC_LPC connector. i have following questions:

1) how i can set SPI interface in zedboard (i mean, where i can assign "sclk, cs#, sdi, sdo" pins from ad7768-4 adc board to zedboard(PL-section) ) ?

2) can I access QSPI Flash by using PL-section of zynq 7000 ?

3) what is the meaning of QSPI Feedback, where it should be connected? 

4) can i use QSPI in standard mode ?

please help me !

Thank you :)

 

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Hi @JASBIR SINGH SAINI,

I have do not have much experience with using FMC's. I did find some materials from Analog Devices that should be useful here and here. I also found an Xilinx forum question about using fmc on the Zedboard here. I would also suggest to reach out to Analog Devices here

cheers,

Jon 

Edited by jpeyron

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10 hours ago, D@n said:

@JASBIR SINGH SAINI,

All of the QSPI flash chips I've worked with support SPI mode by default, requiring a special command to go into QSPI mode.  While I haven't used the flash chip on the zedboard, you might find that useful to know.

Dan

@D@n  please tell me about QSPI and How it is different from standard SPI (in respect of Timing Diagram).

Thank you :)

Edited by JASBIR SINGH SAINI

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@JASBIR SINGH SAINI,

You really need to have a data sheet in front of you for the part  you are interacting with.  In the absence of such a sheet, I'll pick one at random and hope the details apply to your problem.  Let's pick the Cypress S25FL128S to examine.  In that data sheet, you can find a typical Quad SPI interaction timing diagram at the bottom of page 25.  In that example, the communication starts in SPI mode, and a command is given to the device that says you want to read in QSPI mode.  QSPI is then used to send the address, and then the data direction changes and the chip's response comes back in QSPI mode.  If you look at the previous page, figures 4.6 and 4.7 show you the same thing but in SPI (not QSPI) mode.

Basically, to be a QSPI chip, the chip needs to extra wires HOLD# and WP#.  These are held high while in SPI mode, or used as bidirectional communications pins in QSPI mode.

Chapter 10, table  10.2, on page 75, starts the discussion of what commands are available to the device and what each command does.  I have yet to implement all of these commands on any interface I've worked with though.  I tend to focus on the 0x0b (fast read, spi mode, p94), and 0xeb commands (fast read, qspi mode, p99).  I also like to use the chips in XIP (execute in place) mode--neither of which would be appropriate were you using your device in SPI mode.

Dan

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