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zygot

The usefullness of Soft CPU Cores in FPGA Devices

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@D@n,

4 minutes ago, D@n said:

How about a QSPI flash controller. 

And I'll argue that you QSPI controller serves the the case for when you want to use your ZipCPU and need a FLASH interface. You don't have a case for when I'd want to use your ZipCPU. If I want to use external flash in a design I'll just go design that interface. It will be part of my personal IP and I can incorporate it any time I want without needing your ZipCPU. It won't require more resources than I need for my application.

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12 minutes ago, D@n said:

Not all CPU's are "complex design element"s. 

Yeah, I think that they are. But we can agree that a MicroBlaze is less complex and less capable at general computing than an i7-8650U. And we can extend that argument to PicoBlaze and your ZipCPU and any other "CPU" core that you care to mention. They are all still cores with baggage that I rarely want and almost never need in order to execute a complex FPGA design.  And they all require software tools in one form or another that adds complexity that I almost never need or want. I certainly don't need them for designing a peripheral interface.

About my programmable controller.... it's still not ready to publish. When I do it won't be something that I'll argue is a solution to anything but unusual design requirements. It will just be a demo to illustrate an idea and expose those new to FPGA development to concepts that aren't part of basic HDL coursework.

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@D@n and @zygot

FYI, there is a programmable controller or PLC H2-DM1E from AutomationDirect.com which is built on a single Altera FPGA. This is a fast and very capable industrial controller that can be programmed to execute arbitrary control code written in a language called ladder logic. It is mass produced and very inexpensive in comparison with other established vendors. I think it is a very good application for FPGAs but I can imagine what was the amount of effort to bring it to market.

In my personal view Digilent does pretty decent job considering their limited resources. They let people to experience leading trends in programmable devices and provide very useful tech support which is crucial. I believe that Vivado represents that industry leading trend. Tendency for writing everything in HDL can be compared to writing programming code in Assembler. Each language has its strength and use case. Programming should not be an art mastered by few and requiring decades of schooling. Who can afford this?

You may have noticed that two most widely used programming languages these days are Javascript and Python. Both are not the fastest but both have vast libraries allowing to get work done faster that ever. Available IP is more important than anything else.

Let me also make this note. Custom hardware development is expensive and takes time from the time allocated for the project. Unless there is a large quantity of hardware units to be fabricated in the end it is economically more efficient to use COTS for the development. Therefore, adding hard processor to the board along the way will add substantial cost and delay. Once I did custom board with lovely Actel ProASIC3 because had no other choice but tried to avoid such development going forward. These days there are plenty of COTS built on Zynq and it is my design choice whether to use ARM or leave them sleeping. But this extra capability will let me to upgrade the design along the way after the basic functionality is achieved. The price difference between Zynq and FPGA boards is negligible but it buys valuable opportunity to grow the product for new customers or requirements. 

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@Notarobot,

1 hour ago, Notarobot said:

Custom hardware development is expensive and takes time from the time allocated for the project. Unless there is a large quantity of hardware units to be fabricated in the end it is economically more efficient to use COTS for the development.

Your point is taken. Here's my gut reaction. At some point someone has to do the "custom" design and development. In your case it's the COTS vendor. I've not worked for many companies that use COTS. They prefer to have full control over their product through design and production. If all of your software design uses third party libraries and frameworks then your product, for the most part, will be no better than everyone else's using them; and suffer the same shortcomings. It's a similar argument for hardware and combinations thereof. This not an argument against using canned libraries and software or components made by other people, just an observation. If your engineers only configure third party sub-assemblies then how good are they at doing basic., design? Yes, you can build a structure using lego blocks bought form the store and you can design the blocks yourself to build a structure. In the short term one is obviously easier and quicker than the other. In my experience you become proficient by having to do challenging design and having the feedback of failures or overcoming obstacles. My thoughts aren't a criticism of your approach. Indeed if this works for you that's wonderful. I'm the guy who's good at doing the hard, time consuming, risk filled work. You don't get good at that by being smart; you get good at that by being in the trenches of product development warfare.. with the help of a bit of honesty and intelligence. Somewhere  along the line someone's gotta do it. But even if you've figured out how to make someone else take, as you see it, what risks you want to avoid. I'll suggest that you have taken upon yourself a different set of risks; perhaps ones not easy to spot until it's too late. I could go on and on about this but there's no reason to.

1 hour ago, Notarobot said:

They let people to experience leading trends in programmable devices and provide very useful tech support which is crucial. I believe that Vivado represents that industry leading trend.

I understand why you believe this. It doesn't match my industry experience at all. I don't believe that Qsys or the Vivado block diagram flow represents a leading trend or one that, in my experiences, is even considered in industry. It does represent a way to make it difficult for your FPGA customer to use the competition's tools and change FPGA vendors. It does offer a place for third parties to provide IP for customers wanting to pay for perceived low risk development. It's been in my experience, as a general rule of life, that quick and easy paths to success never gets you to your destination. But then I don't sell quick and easy paths to success. There's no doubt that you can find a quick and easy path to wealth selling quick and easy paths to success.

The leading (fashionable) trend is globalization and beating your competitor to the cheapest labor, cheapest vendor, fastest turn around time you can find.... oh and forcing your customers into forced arbitration to avoid class action lawsuits. It can work... for a while... maybe. Personally, I think that this is more of an MBA person's or stock market gambling ruse than a good long term strategy that will serve anyone in the long term. If you get real good at doing this, and I won't argue that you can't make a nice profit in the short term, then I confident in saying that you will get really bad at doing the basic design over time. 

For the record I am not arguing for abandonment of QSYS, or NIOS or MicroBlaze, of GUI drag and drop design flows. If you have the money MATLAB will do your HDL for your DSP algorithm as well ( often ). It's a great way to prototype an idea. I do argue that in the long term it's a bad way to design a product. I won't ever be surprised to hear the counter position from someone who has made some money doing just this. Someone, or some people, always win the lottery. Millions of some ones lose a lot of money hoping for a miracle that will never happen.

Managing risk is a skill set all of its own. I believe that, similar to developing proficiency at basic design (which always involves risk management but on a different level ) you get proficient at managing the risks that you undertake. But the higher level risks are always changing, the rules are always changing, the variables are always changing and it's harder to know how good you experience will translate into tomorrows decisions. Basic engineering risks are, if your are honest about them, more or less the same. The complexity is always changing but fundamental engineering is surprisingly static.

Edited by zygot

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1 hour ago, Notarobot said:

In my personal view Digilent does pretty decent job considering their limited resources. They let people to experience leading trends in programmable devices and provide very useful tech support which is crucial.

Yeah, and they, and their customers, also experience the pain an misery of the very flow that you espouse every time a new version of Vivado gets released or updated. I have 5 versions of Vivado, each with specific node locked licensing features, on 4 different computers just to maintain old projects. Digilent demo code has a remarkable record of always being created with a version that I don't have installed anywhere. The last time I downloaded the full Vivado install it was 40 GB! Yikes, do you realize how long and how many times I have to try to do that using 3 Mbsp DSL?. Everyone has limited resources. Not everyone serves a student or educational market. It may seem like I don't have any respect for Digilent when you read most of my posts. The opposite is true. I just want them to be true to their calling and be a great vendor. I'd like to think that they work as smart and efficiently I I have to. Mostly, though, when I hand over my money for a product to serve a particular purpose I want the support that I think that they can and should provide. So this might be my biggest beef with QSYS and block diagram design flows. Ever since ALTERA and XILINX started providing them they make sure to break designs using older tool versions. It's like using the latest version of a word processing application that can't handle files created by earlier ones;l and providing no tools to do so. It's a way to sell tools at your customer's expense. Either the execs at both vendors don't understand the ill will that this creates, or more likely as long as all vendors do it they don't care.

Edited by zygot

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I came across a neat quote from Jan Gray's blog about the utility of soft cores:

Design productivity is still a challenge for reconfigurable computing.  It is expensive to port a software workload to RTL, to maintain the RTL as the workload evolves, and to wait for hours to recompile a bitstream after each design change.  Soft processors can help mitigate these costs, and provide new pathways to application acceleration.  A mid-range FPGA can now host hundreds of soft CPUs and their interconnection network, and such heterogeneous massively parallel processor and accelerator arrays can sustain hundreds of operations, memory accesses, and branches per cycle.

The blog post is dated December 31st, 2014, but doesn't seem to be too far out of date (yet).

The slides referenced on the blog provided an interesting perspective of both FPGA's and FPGA development as well.

Dan

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@D@n,

Hmmm. well I suppose that you can pick the poison that will kill you. Maintaining code for "hundreds of soft CPUs and their interconnection network" using Vivado doesn't sound at all like a fun way to die to me. I'll stick to designing relatively fixed "firmware" solutions to problems and use a high performance micro when it makes sense. I don't know what Jan Gray wants to build with his "heterogeneous massively parallel processor and accelerator arrays" but I'll bet that a sensible mix of high performance computing elements like those found in Nvidia GPUs combined with FPGA logic for optimization of select processing will do just fine for any of my needs.  Hey, publish a 64 ZipCPU cluster project that does something useful that I can't do in logic and you'll have my attention.

I think that there are a lot of people wishing that FPGAs are the solution to every complex problem, on a poor man's budget. For me FPGAs have advantages for certain things and highly integrated 1+ GHz 8 core DSP processors like the TMSC3206XXX family have advantages for certain things and I'm happy to marry the two for solving actual engineering problems. For most of us, our problems are simpler to address with less complexity and cost. But there have been some interesting array processing products that have come and gone in recent years. And I'm sure that they didn't disappear because they were so simple to use for everyday problem solving. Perhaps my super-computing daydreams are shorter lived than yours or Jay's. 

Now that Intel has bought Altera it's only a matter of time when we get a very interesting ZYNQ competitor. Of course I'm still waiting to those optical interfaces embedded in Altera FPGAs that they've been working on for about a decade now. Transceivers without wires? Now that will get my heart racing.

For now the only thing that Intel has actually done for Altera is to bring the same nonsense to Cyclone that it does with its consumer grade processors. You know, design one processor. Make 50 variations, each with a combination of functions disabled to create 40 market segments, charge through the nose for any that are not horribly ham-strung, and thumb your nose at anyone not willing to pay ridiculous amounts for a PC that will be obsolete in a few years.. Wealth by confusion seems for work for them... but so far they've not had to function in a free market. I like free enterprise. You know.. the idea being that buyers can have a choice between well made highly useful stuff instead of the same crap from 4 vendors; where vendors provide a service to consumers, instead of where consumers become indentured slaves to vendors. Etc... Etc... Too bad that it's a concept that has passed into oblivion.

Edited by zygot

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