Is there no other way?

[TheHowitzer]

Greetings,

I am trying to build a very simple digital signal processing circuit into my FPGA, Basys 3 board. Below you can find a simple block diagram.

As you can see the components are,

- A clock converter

- An ADC ( embedded xadc)

- A digital filtering operation H(e^jw) ( simple addition, multiplication circuit)

- An SPI bus for communicating with an external DAC

I have managed to build the clock converter, and the filtering operation. However, I have failed over and over again at building SPI and ADC blocks. Especially the XADC block gave me ( and still giving ) a hard time.

I am aware that programming FPGAs can be very challenging. However, my question is...

Is there no other way to do it? No simpler way to program my Basys 3 ?

I have spent a good amount of time studying how to work with IP blocks, and the block diagram feature of Vivado. However, it does not work. Or I should at least say, it is not straight forward in any sense. It is not user friendly.

My block diagram is really really simple. I connect all the necessary connections. Clock to clock, data out to.. etc. But I can't even get an analog reading on my Basys 3.

Last but not least, there aren't any tutorials on working with XADC. The video about Basys 3 XADC, made by Xilinx, is a total joke. The other video, "teaching" how to use the IP generator for XADC is also another joke. These are 2-3 min videos, just showing you that IP generation feature does exist. They do not show how to use it in any way.

 

This whole text is not a proper question, I am aware of that. Yet I am open to anything. Suggest me another, simpler way to code FPGAs. Suggest me another, more user friendly device. Suggest me an alternative platform to develop digital signal processing algorithms. Please.

 

Sincerely,

Berk

 

 

[zygot]

@TheHowitzer,

A better way than using the Vivado block diagram flow? Yes, I think so. I don't know what your HDL skills are but there is example code that might help you get started. Look in Digilent's Project Vault. You may have to read through a few projects to find examples specific to your current project but a lot of it is there. Don't understand basic digital design? That's a problem when you are coding in HDL only. You will have to understand how to read data sheets and timing diagrams. If you have absolutely no interest in digital design and have a lot of money MATLAB will write FPGA code for you that will work on specific hardware platforms. You might want to check out Peter Dawson's interesting work here: https://github.com/dawsonjon/Chips-2.0 Hamster's home page has some simple code ( ans some not so simple code, to get started including an audio codec example here: http://hamsterworks.co.nz/mediawiki/index.php/Main_Page 

There is OpenCores and other places to read good ( and not so good ) HDL code.

The caveat to the previous comment is that easy is a relative term. FPGA development is hard work. You can do limited things taking short cuts but just limited things. A better way to do things in an FPGA without learning any basics? I don't think so.

Personally, I don't know why anyone with no interest in digital design would want the exasperation of using FPGAs.

[TheHowitzer]

12 minutes ago, zygot said:

@TheHowitzer,

A better way than using the Vivado block diagram flow? Yes, I think so. I don't know what your HDL skills are but there is example code that might help you get started. Look in Digilent's Project Vault. You may have to read through a few projects to find examples specific to your current project but a lot of it is there. Don't understand basic digital design? That's a problem when you are coding in HDL only. You will have to understand how to read data sheets and timing diagrams. If you have absolutely no interest in digital design and have a lot of money MATLAB will write FPGA code for you that will work on specific hardware platforms. You might want to check out Peter Dawson's interesting work here: https://github.com/dawsonjon/Chips-2.0 Hamster's home page has some simple code ( ans some not so simple code, to get started including an audio codec example here: http://hamsterworks.co.nz/mediawiki/index.php/Main_Page 

There is OpenCores and other places to read good ( and not so good ) HDL code.

The caveat to the previous comment is that easy is a relative term. FPGA development is hard work. You can do limited things taking short cuts but just limited things. A better way to do things in an FPGA without learning any basics? I don't think so.

Personally, I don't know why anyone with no interest in digital design would want the exasperation of using FPGAs.

First of all, I sincerely thank you for your answer. This answered quite alot for me. Yet I just want to make some additions to my initial question.

I am mainly interested in Digital Signal Processing. I am also interested in digital design. However, the extent of my interest varies from topic to topic.

Digital design is interesting but I do not think FPGA is all about digital design. Let me explain what I think.

I know a bit about digital design, the delay elements, adder/multiplier structures, multiplexers etc. And I can surely design a DSP network using just those. However, the problem I am having is related to coding in VHDL. I am a beginner in the topic, and the learning curve is really, really steep ( for me at least ).

I really enjoyed the idea of Vivado block diagram flows. Actually it is exactly what I am looking for. Just drag and drop the digital design elements, connect them together, without using any description language. It is the dream. But I have failed to work with the block diagrams, especially for the XADC part. The tutorials are not educational at all.

Maybe you can suggest me a book that focuses on Vivado Block Diagram flow. Or some kind of tutorial videos that I have missed on youtube ( I have scanned quite a lot but still..)

Sincerely thank you,

Berk

[D@n]

@TheHowitzer,

Is there an easier way?  Probably not.  Can the way be made easier?  Likely.

Some time ago, I wrote an article discussing the difference between the typical student's approach to FPGA design and the methods commonly taught for FPGA design.  My basic conclusion was that not only is there a very disciplined method that is necessary to move forward, but that the right tools are also necessary (as is good old-fashioned engineering reuse).

I then spent some time outlining the tools that I use to "see" inside of an FPGA design, so as to know what is going on.  This was followed with a demonstration development of a tool that could be used to "see" and "capture" logic within an FPGA--so as to debug it.  A mid-point overview was presented again here.  While I don't know how  you are currently debugging your design, I personally found these tools quite valuable.

All this is to say that, were I building the components you are referencing, I would:

1. Build a simulation proving the logic dealing with each individual component.  This simulation may involve, in the case of the XADC, creating a co-simulation of the XADC.  (I did this for a SPI based A/D here.)
2. Use some form of debugging bus and scope to capture the logic (and responses) associated with interacting with any hardware device.  This should allow you to "see" the responses from the device to know if you are doing things right (or wrong)
3. Update your XADC simulation model as well as your SPI D/A model, so that it matches what you learned of the actual hardware interaction.
4. Build an integrated simulation, using your XADC simulation model and your D/A simulation model.  You should be able to put a waveform into the input, and get an appropriately processed waveform on the output.  (I used a sine wave as a testing input.)  Debug by printf can be useful--I use it often when simulating things.
5. When that works, then try and go back to the Basys3 and see what's going on.  Connect a "scope" within your design as necessary to understand when things are different from what you are expecting.

I also wrote a blog post on debugging DSP algorithms ... you may or may not find it relevant to what you are doing.  (It was in the middle of a series on how to build a linear interpolator for upsampling a signal.)

Hope this helps,

Dan

[zygot]

@TheHowitzer,

I've been doing digital design for over 3 decades and DSP and FPGA development for over 2. But what do I know.

On the surface the Vivado block diagram looks to be easy. On the surface free diving looks to be easy too. What's there to do? Learn how to hold you breath ( the underwater record is about 22 minutes ), go down fast and up slow, and don't get the bends ( the free dive record is over 100 meters ). I don't recommend either sport. My point is that you only get to see the issues once you start working at an endeavor. You can do a lot of limited things quickly using the design flow that you see as a "dream". Or perhaps, as you so eloquently point out maybe not... Your dream is my nightmare. I've done FPGA development and DSP FPGA development for a number of companies and none of them would consider using your dream flow. But what do they know?

I'm not trying to be critical, just giving my opinion. In the end writing your DSP projects in straight HDL will be easier and your work will survive Vivado, Quartus, or any other tool revision without having to accommodate updates.  I've done the block diagram flow in Vivado and ISE so I do know a thing or two about it. There are books on DSP using FPGA devices but I don't have any recommendations.

Since you have the digital design knowledge why not take the time to learn an HDL? The idea that you will become proficient at doing something without having to understand the details doesn't make sense to me. I understand that your goal is DSP and you want a quick way to get started. You can do DSP with a micro and C. If you really want to learn DSP face all of the details and do it in an HDL. Of course you have to learn and HDL. FPGA DSP development involves a lot more than understanding an HDL and DSP theory. I believe that you'll be a lot happier taking the long route to your aims. You'll be amazed at how simple the VHDL that accomplishes just what you want to do really is, even if the knowledge behind the code is quite complex.

Humor me and read some good HDL code.

[zygot]

Hey, at no extra charge you get an old man story.

Many years ago I attended the first Visual Basic and Excel seminars from that company that used to make ( sometimes half decent ) operating systems and destroyed a lot of good companies along the way. Most of the audience were mainframe people who offered tools that had annual licensing fees 1000X the price of VB. There were oohs and gasps from the onlookers as features that their tools never tried to do were being demonstrated. "So easy even your secretary can do it" was offered by the person running the demos. A dream come true! Sure, corporate elite have that dream ... no engineers to deal with, no payroll, big profits, trivial work effort... Guess what, even though a few people became fabulously wealthy selling VB, not all of the technologies that we use today were developed using VB and designed by secretaries. ( I'm pretty confident in that assertion... but I could be wrong)

Be careful what you wish for. In the not too distant future the executive's dreams will be available in some other form... and 1000 humans will work and support the other 8 billion who will be given an allowance just for being alive. Sure...

[jpeyron]

Hi @TheHowitzer,

I would suggest to look at our resource page here for the Basys 3. It has basic Microblaze tutorial as well as an XADC tutorial that might be helpful.

cheers,

Jon

[zygot]

I don't want to suggest that you ignore the advice from @jpeyron but, Microblaze? Why not use a Raspberry Pi? It's cheaper and has a whole lot more horsepower... to do DSP in C; and you don't have to bother with this FPGA nonsense. Oh, you can create you own DSP IP in the FPGA. But then you'd have to learn Verilog or VHDL... and you still have to figure out how to use the Vivado block diagram tools. And I can almost guarantee that in 3 years when you want to rebuild your project the current version of Vivado will have broken it. I've created IP for the Vivado block diagram flow. It isn't a trivial task and you have to know an HDL. But perhaps you'll find the right video to help with that. I can pretty confidently state that if you are looking for a point and click, drag and plop way to do "DSP using an FPGA" none of the FPGA vendors offers what you want. If you're already an expert on everything and want to prototype an idea before implementing it yourself then perhaps the time learning the tools is worth while. Oh, and have you gone through the active threads on using Microblaze with your board?

I feel like the old ranger deep in the mountains mid-winter who's happened upon a city slicker wanting to know where he can find the grizzly bears. But (relief for you) I have nothing more to add.

However you proceed I wish you a happy journey and success.

[TheHowitzer]

7 hours ago, D@n said:

@TheHowitzer,

Is there an easier way?  Probably not.  Can the way be made easier?  Likely.

Some time ago, I wrote an article discussing the difference between the typical student's approach to FPGA design and the methods commonly taught for FPGA design.  My basic conclusion was that not only is there a very disciplined method that is necessary to move forward, but that the right tools are also necessary (as is good old-fashioned engineering reuse).

I then spent some time outlining the tools that I use to "see" inside of an FPGA design, so as to know what is going on.  This was followed with a demonstration development of a tool that could be used to "see" and "capture" logic within an FPGA--so as to debug it.  A mid-point overview was presented again here.  While I don't know how  you are currently debugging your design, I personally found these tools quite valuable.

All this is to say that, were I building the components you are referencing, I would:

1. Build a simulation proving the logic dealing with each individual component.  This simulation may involve, in the case of the XADC, creating a co-simulation of the XADC.  (I did this for a SPI based A/D here.)
2. Use some form of debugging bus and scope to capture the logic (and responses) associated with interacting with any hardware device.  This should allow you to "see" the responses from the device to know if you are doing things right (or wrong)
3. Update your XADC simulation model as well as your SPI D/A model, so that it matches what you learned of the actual hardware interaction.
4. Build an integrated simulation, using your XADC simulation model and your D/A simulation model.  You should be able to put a waveform into the input, and get an appropriately processed waveform on the output.  (I used a sine wave as a testing input.)  Debug by printf can be useful--I use it often when simulating things.
5. When that works, then try and go back to the Basys3 and see what's going on.  Connect a "scope" within your design as necessary to understand when things are different from what you are expecting.

I also wrote a blog post on debugging DSP algorithms ... you may or may not find it relevant to what you are doing.  (It was in the middle of a series on how to build a linear interpolator for upsampling a signal.)

Hope this helps,

Dan

Hello Dan,

First of all I sincerely thank you for your answer. While surfing the forum I always come across your answers and they are really, really educational. They helped me a lot.

After reading your reply, I see both you and zygot focus on a similar point, which is learning HDL. And that is probably what I am going to do now.

I have opened all of the links you have provided as side tabs, and will probably start reading them soon. To be honest, I have never physically debugged my configuration, and will probably focus on these aspects of the design as well. 

Thank you once again Dan, take care.

Berk

[TheHowitzer]

7 hours ago, zygot said:

@TheHowitzer,

I've been doing digital design for over 3 decades and DSP and FPGA development for over 2. But what do I know.

On the surface the Vivado block diagram looks to be easy. On the surface free diving looks to be easy too. What's there to do? Learn how to hold you breath ( the underwater record is about 22 minutes ), go down fast and up slow, and don't get the bends ( the free dive record is over 100 meters ). I don't recommend either sport. My point is that you only get to see the issues once you start working at an endeavor. You can do a lot of limited things quickly using the design flow that you see as a "dream". Or perhaps, as you so eloquently point out maybe not... Your dream is my nightmare. I've done FPGA development and DSP FPGA development for a number of companies and none of them would consider using your dream flow. But what do they know?

I'm not trying to be critical, just giving my opinion. In the end writing your DSP projects in straight HDL will be easier and your work will survive Vivado, Quartus, or any other tool revision without having to accommodate updates.  I've done the block diagram flow in Vivado and ISE so I do know a thing or two about it. There are books on DSP using FPGA devices but I don't have any recommendations.

Since you have the digital design knowledge why not take the time to learn an HDL? The idea that you will become proficient at doing something without having to understand the details doesn't make sense to me. I understand that your goal is DSP and you want a quick way to get started. You can do DSP with a micro and C. If you really want to learn DSP face all of the details and do it in an HDL. Of course you have to learn and HDL. FPGA DSP development involves a lot more than understanding an HDL and DSP theory. I believe that you'll be a lot happier taking the long route to your aims. You'll be amazed at how simple the VHDL that accomplishes just what you want to do really is, even if the knowledge behind the code is quite complex.

Humor me and read some good HDL code.

Hello Ser Zygot,

To begin with, I really like your tone - nothing like an old school lecture on “not to dive in without knowing your stuff”. I see that you have spent a good amount of time on digital design topics, and I can assure you that I meant no disrespect. It is pretty evident that I am really new to the material, and I should be allowed to have some silly comments about the topic.

Before explaining my takeaways from your reply, I would like to explain the reason why I was so eager to jump into digital design without knowing much about the topic. I am a mechanical engineering student. Topics such as Digital Signal Processing, or even coding, are not included in our curriculum. I am already sacrificing a bit by self-studying Digital Signal Processing, and I already feel somewhat stretched. This is why I was slightly “unwilling” to learn HDL languages. In the past I had several attempts to learn it, but noticed that it took me quite a bit of time. This is why I embarked upon my search for new alternatives.

However, I sincerely understand what you mean in your reply. And I am totally with you. I thought there “may be” an easier way for me to work with FPGAs, without taking the initial steps. But as you have said, this can very well become a nightmare, rather than a dream. I will take the necessary steps to “read some good HDL code”.

But before departing for my (probably long) journey, I would really like to ask for a favor. Suggest me a source of some kind, and save me the time for searching one. At least do this, so that I can go on by knowing that I am on the right track.

All in all, I sincerely thank you for your reply.

Berk

[TheHowitzer]

3 hours ago, jpeyron said:

Hi @TheHowitzer,

I would suggest to look at our resource page here for the Basys 3. It has basic Microblaze tutorial as well as an XADC tutorial that might be helpful.

cheers,

Jon

Hi Jon,

I sincerely thank you for your reply. The links you have provided seem to contain some valuable information on the topic. My only concern is that using a module such as Microblaze will somewhat "lower" the quality of my design. In my daily life I am already familiar with programming microcontrollers, especially using languages such as C, C++ etc. The plan was to implement my design, which runs very slowly on microcontrollers, on an FPGA board. This is why even though your comment on Microblaze is valuable, it does not really serve my needs.

However, I will check the resource page about XADC rightaway.

Thank you sincerely,

Berk

[Notarobot]

@TheHowitzer

I am very impressed with you motivation and desire. It is exciting area of electrical engineering and you will enjoy it as I am.

There are a lot of resources right now available for getting nano-degrees in any professional areas. It can be free or for fee massive online courses (MOOC) or Youtube. Although I am experienced EE I am using those sources from time to time. Video tutorials are the fastest way for me to get the idea. You can always look for advice on the Digilent forum.

When I started learning VHDL this was not available and books were the only source. It was hard but my investment in VHDL payed off many times. At the time I chose VHDL because it is well designed language similar to ADA.

It should be noted that every task has the proper/optimal tool. The board you are using might be not the best for accomplishing your task. Think about it.

Personally, I like Vivado block design approach for many reasons and I don’t worry that in three years they will make it unusable for my current project. Change and obsolescence is a fact of life and nothing we can do except to adapt to it. Also I don’t believe that Xilinx will abandon the block design because this is the only way to deal with complexity. Nobody can do anything these days without reusing COTS IP.

Regarding to Matlab/Simulink I would advise you to get student version of it and simulate your design in Simulink for full understanding of your design. It will save your debugging time.

Learn HDL and have fun!

[zygot]

@TheHowitzer,

I appreciate your generous and understanding reply. Though I try to be concise and direct I've been know to offend people who misinterpret my intentions. When I started out using VHDL I already had years of experience doing digital design using just about every technology there is, including some that most people have never heard of. I had already been using the FPGA forerunners, PALs and GALs using PALASM, AHDL, and other languages for 10 years. This gave me a distinct advantage in my perspective. I was fortunate enough to work for a company that sent me to a class to learn VHDL. While the class presented some good pointers, tips and insight that's hard to glean from reading a book, my real development in  HDLs came from doing designs and expanding my use of the language. But of course, interacting with a lot of other people having more experience and writing better code was invaluable. This is a problem for someone wanting to pick up a very complex subject by themselves. The syntax for VHDL for synthesis isn't that complex once you get a few key concepts down but the details behind the VHDL is where the complexity is. I really like the suggestion of finding a course to get started on a firm ground. Coming from a CS perspective would be, I believe, a bit of an obstacle. An ME background might be a good thing. I don't know of any good tutorial books on the subject. I still refer to Peter Asheden's The Designer's Guide to VHDL though my edition is a bit dated. It is an excellent book but not a tutorial. So, I'm a bit frustrated that I don't know of a solid source for someone like you to learn this stuff. Xilinx and Altera both offer a load of application notes and example designs including well written code. Altera has had some really good coding guidelines and at one point a nice "cookbook" of example code. I guess the closest analogy to learning and HDL is learning chess. You can read a lot of texts on standard moves and theory but getting your behind kicked playing a lot of games with much better and more skilled players is the way most of us will develop.

As to your concern that using a microprocessor ( hard for soft like the Microblaze ) is of "somewhat "lower" the quality ", I wouldn't agree. I've done a fair share of programming that's included a lot of DSP devices. In fact I've done more DSP work coding dedicated DSP devices than in FPGA hardware. The dedicated DSP is less popular than it was when they were alternatives to slow microprocessors but there is still a place for them. TI and Analog Devices haven't stopped selling them or releasing new ones. The DSP concepts are the same. You have to worry about more details using an FPGA if you code your own algorithms.... that's the draw of doing DSP in an FPGA for me. I like the details. My only real objection to Microblaze is that you have all of the Vivado issues and you end up using C. 20 years ago, when there were a lot of vendors offering cheap DSP development boards I would have directed you to TI or ADI. They are still great resources. A Raspberry Pi 3 has way more horsepower to do audio frequency DSP work than you are likely to need. A book that really whetted my appetite for DSP was Musical Applications of Microprocessors written by Hal Chamberlin. It was published in 1985 and extolled the great power of the new MC68000. It's still a great read. There are still plenty of places where a low power cheap micro or DSP is a better choice than an FPGA. What an FPGA excels at is that it's an open book for implementing a parallel processing topology optimized for a particular application.

I'll end by saying that the reason that I replied to your post in the first place is that I get really excited when someone expresses a desire to accomplish something precisely like you have. My desire is to push you toward a path where you will succeed and grow. There are a lot of choices that aren't as easy or as simple as "advertised". Thank you @Notarobot for adding the counter perspective to my thoughts on the Vivado block diagram flow.

[TheHowitzer]

Hello all,

I was a bit busy with another project which had some sort of a deadline. Sorry for my late reply.

I sincerely thank you all for your replies and suggestions. After reading your comments, I think I will learn the language. It seems challenging at the moment, yet I will probably benefit from learning it for a very long time, if not for the rest of my life.

Thank you all once again, take care

Berk