How to input entries from cmd or a computational application (or Matlab) to a VHDL file in ISE 14.7?

[cristian_zanetti]

I am currently using nexys 4, I want to input console inputs to my VHDL design. I know that ISE uses a .ucf file where the inputs and outputs of the card are assigned, however my interest is not to use the inputs provided by the card and I do not know how to assign these inputs sent from an application, I would thank anyone who can help.

[Piasa]

It is not entirely clear what your goal is here.

If you need to show an FPGA design with synthesis-time input data that are reasonably small, you can store them in the FPGA's BRAM.  The FPGA can then process the synthesis-time input and you can measure the performance of your design.

If you need dynamic input, you will need to examine your options.  This board has some ethernet and usb options.  This is part of practical FPGA design of communication infrastructure.  There should be example designs that can guide you on the fundamentals.

[cristian_zanetti]

Ok, my problem is as follows, I will make a graphic interface of the data acquired from XADC of the nexys 4 DDR, in the interface I want to change some aspects of conversion of the nexys as the averaged, for example I want it with a button On the interface change the averaging of 16 samples to 256 samples.

[elodg]

Write your own UART controller and implement a command-based protocol on top of it.

If you have a microblaze-based design, add the Uartlite IP and implement your command-protocol in software.

This is an example of UART command processing written in software for the Zybo: https://github.com/Digilent/Zybo-hdmi-out/blob/master/sdk/displaydemo/src/display_demo.c