I'm trying to achieve video processing with Atlys board.
My goal is to real-time rotate some VGA Stream (640x480@60) form hdmi input to 720p hdmi output. Rotation is 90° clockwise.
The attached picture sketches what i'm aiming at.
I've been thinking of using HDMI Demo project for this.
I am a total noob to all this FPGA thing, i'm slowy trying to learn but it's not that simple when you don't know anything about electronics =)
From what I have understood, in the HDMI demo the frame in written to DDR2 memory with a single call to the VFBC. TMDS data is pushed in the FIFO and when a new frame is detected, then the Write Command is emitted and stores the whole frame to memory.
I thouht a good design for my project would be to store line by line, configuring the VFBC command with X=1, Y=639 and BaseAdress = [(40*lineStride)+(1160-lineCnt)] * 2.
This way :
line 1 (blue) is stored in the frame buffer as a 1 pixel wide column starting at pixel (1159,40)
line 2 (green) is stored in the frame buffer as a 1 pixel wide column starting at pixel (1158,40)
...
line 640 (orange) is stored in the frame buffer as a 1 pixel wide column starting at pixel (680,40)
My understanding of the HDMI Demo is that modifying user_logic.vhd in hdmi_in is all i have to do, so that instead of writing the whole frame in one vfbc command, the frame should be written line by line with 640 VFBC commands, one for each line, with constant width = 1, constant height = 639 and baseAdress computed as shown above.
Is this correct ? Any Suggestion, hint, advice or help will be highly appreciated as I quite lost with this !!
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chcollin
Hi FPGA gurus !
I'm trying to achieve video processing with Atlys board.
My goal is to real-time rotate some VGA Stream (640x480@60) form hdmi input to 720p hdmi output. Rotation is 90° clockwise.
The attached picture sketches what i'm aiming at.
I've been thinking of using HDMI Demo project for this.
I am a total noob to all this FPGA thing, i'm slowy trying to learn but it's not that simple when you don't know anything about electronics =)
From what I have understood, in the HDMI demo the frame in written to DDR2 memory with a single call to the VFBC. TMDS data is pushed in the FIFO and when a new frame is detected, then the Write Command is emitted and stores the whole frame to memory.
I thouht a good design for my project would be to store line by line, configuring the VFBC command with X=1, Y=639 and BaseAdress = [(40*lineStride)+(1160-lineCnt)] * 2.
This way :
My understanding of the HDMI Demo is that modifying user_logic.vhd in hdmi_in is all i have to do, so that instead of writing the whole frame in one vfbc command, the frame should be written line by line with 640 VFBC commands, one for each line, with constant width = 1, constant height = 639 and baseAdress computed as shown above.
Is this correct ? Any Suggestion, hint, advice or help will be highly appreciated as I quite lost with this !!
Cheers
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