Jens Posted July 27, 2017 Share Posted July 27, 2017 The "Nexys Video™ FPGA Board Reference Manual" (Revised May 30, 2017) describes in Table 9 (page 20) the "Recommended usage" of the pins of JXADC with "LVDS_25 input/output" (with V_ADJ=2.5V). However, the discussion in has led to the result that LVDS-standard is not supported without changing the board. I would recommend to change the reference manual at this point. The documentation should clearly name supported standards especially if it is targeted to students that may not know all details of the IO-standards. The best way of a replacement of "LVDS" would be a list of IO-standards that work on this connector without changing the board. If the list is too long (the list of standards supported by Artix-7 fills several pages) it can be moved to the appendix. The minimal solution would be the replacement of "LVDS" by "differential" and let to the user/student to find out if a certain standard can be implemented with the board. Btw. There is a small typo in the table: The 3rd differential pair of JXADC is 3-9 (according to the schematic). Link to comment Share on other sites More sharing options...
zygot Posted July 27, 2017 Share Posted July 27, 2017 @Jens, The Digilent reference Manuals that I've used leave a lot to be desired in terms of accuracy. The Genesys2 documentation is just awful ( at last time that I checked... I've been asking for corrections for well over a year but evidently, unless someone volunteers to do it for free it won't happen) and not befitting of a board that costs so much. I strongly recommend referring to the schematic before using any connector IO, or even IO connected to any external parts for that matter. The lawyers would argue that JXADC can do LVDS_25 when Vadj=2.5V, just not perhaps to any useful purpose. Bitgen will let you know if there are IOSTANDARD restrictions for analog capable pins. I honestly have never tried using this connector for anything other than as an XADC input. I agree with you that Digilent should just advertise XADC PMODs as Analog input connectors. There's nothing wrong in having a connector dedicated to a single purpose. And advertising it as such would eliminate confusion and possibly customer regret at having made a purchase. I want to believe that Digilent's promotion of board features, when wrong, is just an oversight... so when an error is pointed out it should be corrected. I realize that there are a LOT of places where this needs to be done. Note that the list of supported IOSTANDARDS for any particular IO pin is dependent on the Vccio of the IO bank on which the pin appears. So the list isn't that long. In the case of boards with IO banks powered by a user selectable Vccio ( Nexys Video and Genesys2 come to mind ) there are different sets of supported standards for each voltage... with the caveat that certain standards require the proper termination. To anyone purchasing any FPGA board from any vendor do get the pertinent documentation for the FPGA device from the FPGA vendor. For Digilent customers having recently released boards this includes ug471_7Series_SelectIO.pdf. Link to comment Share on other sites More sharing options...
jpeyron Posted July 27, 2017 Share Posted July 27, 2017 Hi @Jens @zygot, I have updated the Nexys Video wiki reference manual and the pdf will be updated by the end of today. We have also updated the pmod pinout table for the genesys 2 reference manual as well. thank you, Jon Link to comment Share on other sites More sharing options...
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