Required 1.8v GPIO FPGA board preferably Artix 7


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Hi,

  I developed my project using Basys3 Board (Artix 7). Now I want 3 of my GPIO needs to work in 1.8v. I understood from data sheet I need to use bank 14 for this. but I don't know how to fix in the Basys3 trainer board.

 

Will you please advise any FPGA (Artic 7) board or any other FPGA which have 1.8v GPIO for few pins.

 

Note: I used Mixed Mode Clock Manager(MMCM) for my project to have 312MHz clock.

 

Kindly advise.

Thanks and Regards

Lakshman.

 

 

 

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@lakshman,

Sigh.  I think I'm going to need to add this to my list of most common Digilent support requests.  You aren't the first one who has asked.

The problem is that the FPGA I/O voltages are set on a per-bank basis.  You can't change the I/O voltages without changing every wire on the bank.  Doing so will require a soldering gun, adding a wire or two to your board, you might need a drill, and perhaps even some new capacitors ... it's not pretty.  (No, I've never tried doing so myself ...)  It will also thoroughly void any warranty you might have, and risk breaking your board entirely.

You might find that a PMod Level shifter is a whole lot easier to purchase than the risk associated with trying to change the I/O voltage levels.

Dan

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Dear Dan,

 Thanks for your reply. Yes I am aware of PMod Level Shifter it's a uni-directional level shifter(one direction at a time).  we already discussed this issue few months back.

I need bi-directional level shifter to solve the issue.

will please suggest some bi-directional level shifter.

 

Note : PMod Level Shifter works by the directions of the various pins are controlled by physical switches. In my project , I need  real-time ability to switch the direction of GPIO from 3.3v to 1.8v & 1.8v to 3.3v

Kindly advise.

Thanks and Regards

Lakshman

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@lakshman,

Hmm ... yeah ... the real-time direction shift kind of needs some intelligence, sort of like an FPGA might provide, now, doesn't it?

Digilent offers two boards with programmable I/O voltages: the Nexys 4 Video and the Genesys boards.  However, as I understand them, all of the programmable I/O is on the FMC port.  It's what you've asked for, if I understand correctly, just not in the really low cost or the PMod format.

Dan

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@lakshman,

Almost, but not quite.  Certain GPIO banks have a programmable voltage--for the whole bank.  Whether that voltage is 3.3V, 2.5V, 1.8V, or 1.2V is up to you.

See the power supplies section (section 1) of the refernce manual for more information on VADJ (the adjustable voltage bank's power supply).  You can also find which wires this applies to by looking through the schematic.  Look at banks 15 and 16 on pages 10 and 11 for more information.

Dan

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  • 3 years later...
14 hours ago, Zzingoh said:

I am also looking for 1.8V FPGA. Can you please share what FPGA you are using and how to set 1.8V?

FPGAs use a number of voltages depending on the die feature size. The Vccio voltage that powers the IO banks is decided by the FPGA board designer. Some FPGA boards have user adjustable Vccio. Boards with an FMC connector like the Nexys Video and Genesys2 will have user selectable Vccio for some IO connected to the FMC connector. Boards that support SYZYGY will as well.  Some boards are designed so that the user can supply a Vccio to certain IO Banks. This comes with complications as current FPGA devices require having their voltages appear in a particular order on powering up. You have to know what to look for.

In general, it's better to select an FPGA board that fits your needs than to try and accommodate one that doesn't.

A really nice, low cost FPGA board that can have its GPIO set to 1.8V with a single resistor change is the Numato Labs MIMAS-A7. Be warned that it's a really tiny resistor. Also, the vendor is having issues, like almost everyone else, with supply due to COVID-19.

A good general rule of thumb is that if you don't know how to design a circuit that makes a particular interface compatible with an FPGA board then it's best to stick with vendor produced boards that let you accomplish your project. You could also learn how to design with logic ( not the programmable kind ) devices.

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Check Trenz TE0725 family (remove one 0 ohms resistor for the bank voltage, solder a jumper wire to the large capacitor of the on-board regulator => Voilà, 1.8 V, even mixed with 3.3 V on the other bank if you want)

The ICE 40 HX8K EVB (Lattice) is another board that can be rigged up for different VIO.

Edited by xc6lx45
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Also the Terasic OpenVino Starter boards (formerly C5P).

One consideration is that, in general lower IOSTANDARD gpio, especially differential signalling, imply a higher bandwidth transmission line and hence carefully constrained PCB layouts and terminations as well as connectors with suitable high frequency characteristics. Those requirement generally make connecting the FPGA pins (balls) to and external PCB more difficult if you need high performance. Vccio just restricts the possible IOSTANDARD options. The ideal situation is one where the FPGA board already has a suitable connector for your application.

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@xc6lx45 @zygot

Thank you so much for your suggestion

I also found Neso - Artix 7 FPGA Development Board. It has a rotary power switch for Bank 35. so look like easy to set up. Do you think it is good option as well?

Also I am seeing Nexsys Video. I am not sure how to set up Set_vadj. Do you know how? What is pros and cons to use it? 

 

Thank you

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one thought, you can configure 7 series 3.3 V inputs for 1.8 V input.

There are hacks like using a series 10 kOhms resistor. It needs to drop 1.5 V so it'll sink 150 microamps into the ESD diode of the 1.8 V device at the other end. For proto-style development (and I guess that's what most of the one-size-fits-all-boards are all about) this is often acceptable.

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I've been using the Nexys Video for some time now. If you can make use of the FMC connector or need to do video ( using your own IP ) then it's a very handy platform. The Vccio for the FMC IO banks can be set in your HDL code using fixed voltage IO pins. Digilent could do a better job with helping people set up their FMC IO bank voltages**. I much prefer the Genesys2 approach that has jumpers for selecting Vccio as I can't think of a reason to change this on the fly... though I can think of a few ways to regret being able to change Vccio inadvertently.

Unfortunately, the FMC connector is the only variable Vccio IO options... though Digilent did an excellent job on both boards. I've use a number of FMC mezzanine cards on both platforms with excellent results. I haven't tried doing any wide LVDS busses on either board but Digilent will provide PCB trace length reports for both boards if you ask. That's pretty much all you can ask for if you need to design your own FMC mezzanine card for either board,

Digilent has the Eclypse-Z7 for SYZYGY that I've used but wouldn't recommend yet due to support deficiencies. Digilent also has a cheaper SYZYGY board that I have no experience with, so I can't comment on it. Opal Kelly has an Artix SYZYGY with 2 standard ports and one transceiver port plus USB 3.0 connectivity. I prefer to restrict my comments to platforms with which I have experience.

[edit] If you can get the Genesys2 at academic pricing or can afford the extra cost this is definitely a better 'bang for the buck' choice. I use one regularly. **Also, I forgot to mention that the Differential PMOD Challenge has code examples for setting the Nexys Video FMC IO bank voltages safely.

Edited by zygot
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4 minutes ago, xc6lx45 said:

There are hacks

I suggest limiting hacks to low performance applications. You can always find a way to connect logic with different standards without violating important specifications, but the cost is almost always performance. Performance isn't always as important as one presumes so there are no universal rules.

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Thank you.

I forgot to mention my project. I am developing SPI slave through PMOD on 1.8V. Looking at the Nexsys Video, it support VADJ is connected to XJADC. So I am trying to investigate the possible boards with pros and cons.  

 

Would you please explain more about "The Vccio for the FMC IO banks can be set in your HDL code using fixed voltage IO pins."

So I need to add "set_vadj[0]" and vadj_en in RTL?

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Though this is a bit of an expansion of your questions You should carefully consider the initial purpose for choosing a board. If you want to do anything exotic then you better be competent with the HDL design flow or stick to a platform that has usable, no license required code and interfaces to get the job done.

If you need the highest possible PC to FPGA data rate then the Terasic OpenVino started kit is the only option. You can do USB 3.0 with a bit of work using the FMC connector but then you lose your GPIO. The Opal Kelly platforms have USB 3.0 built in but a closed ( but versatile and high performance )  PC interface. For moderate data rates the Nexys video and Genesys2 have 1GbE Ethernet PHYs but be prepared to roll you own interface. Both also have usable USB 2.0 parallel bus interfaces in the maximum sustainable 30 MB/s data rate realm.

Picking a platform may be the most important decision.

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10 minutes ago, Zzingoh said:

I am developing SPI slave through PMOD on 1.8V.

All Digilent FPGA board PMODs are on fixed 3.3V IO banks. This would seem to constrain you to the 'hack" approach if you want to use a Digilent PMOD. There's nothing stopping you from connecting a Digilent PMOD add-on board to an FPGA board form another vendor; though obviously, some will require less work. Normal PMODs have 200 ohm series protection resistors. The differential PMODs don't.. but also don't support LVDS.

You should at least look at the Mimas-A7. It has a smaller A75T device as opposed to the Nexys Video A200T but at a lower cost and a lot of the same functionality. The only problem might be buying one at the moment. The FMC connector is likely a bit of over-kill for your needs.

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1 hour ago, Zzingoh said:

All vhd zip are corrupted in pmod_challenge_r1/r2. What file should I refer to?

I don't know why this would be as I've downloaded the projects from Digilent's site myself without issues. There are 'less than  trust-worthy" zip archive programs out there. You are the first person to report having problems with any of the projects that I've posted over the years.

Basically, post-configuration I keep vadj_en de-asserted as a counter counts up from zero to a terminal value .A few milliseconds into the count I  then set the the set_vadj[0] pins to the appropriate levels and wait another 100 milliseconds or so before asserting vadj_en. The counter never resets or wraps so that Vadj can't change during use. I advise using a scope on power-up to confirm operation of the voltages.

[edit] I just downloaded pmod_challenge_R2.zip and opened it on Centos, and read the source code with no problems...

Edited by zygot
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