Nexys 4 DDR Pmod AD1 not getting data

[deltaepsilon3]

Hello,

I am using a Nexys 4 DDR board with a Pmod AD1, and I'm struggling to get data from the ADC. I first tried using the IP, but the IP seems to be designed for a different board (the warning message is [IP_Flow 19-4965] IP PmodAD1_pmod_bridge_0_0 was packaged with board value 'digilentinc.com:arty:part0:1.1'. Current project's board value is 'digilentinc.com:nexys4_ddr:part0:1.1'. Please update the project settings to match the packaged IP.) So instead, I wrote some VHDL code to communicate with the Pmod, which I have attached. I attached a battery (about 1.2V) to A0 and GND to test. However, when I run the program, I am not getting any data out from D0. I measured the voltage between D0 and GND, and it was steady at 0V.

I might be misunderstanding how the ADC is intended to be used, so here are my questions:

1. The reference manual says the ADC “converts an analog input signal ranging from 0 volts to Vdd.” The datasheet says Vdd is specified for 2.35V to 5.25V. What exactly is Vdd, and can I check or specify its value? Is it related to the Vcc input in header J2?

2. What is the purpose of the Vcc input in header J2? Does the Pmod itself need power, or is it enough if the FPGA board is powered? (Currently powering the board through the USB-JTAG from my laptop)

3. Is my code correct for reading data? (I have omitted some code that displays the 12 bit number on the 7 segment display because I am sure it works correctly, but I can attach all of my code if necessary)

4. Am I using the ADC correctly by plugging the battery in to A0 and GND to measure voltage?

Any help is greatly appreciated!

ADC_SPI.vhd

[jpeyron]

Hi @deltaepsilon3,

The error you received is not an issue. It is just stating that the IP core was made using a different board. We make the IP cores to be compatible to all of our fpga's. This IP core unfortunately does not work for both channels that is available on the PmodAD1 due to its unique spi communication.  Here is the schematic as well for reference.

The 2.35V to 5.25V is the operating voltage to be given on J1 Vdd. In the case with the PmodAD1 and the Nexys 4 DDR board Vdd is 3.3V. Vdd and ground on J2 are extra access to vdd and ground if you were to be testing another component like shown in Hamsters VHDL project here. The quickest way to test your code is to simulate it like the code provided by hamster. Another way to test and see if you are sending data would be to o-scope the cs, sclk,D0 and D1 pins on J1. I believe the only thing you would need to change is the XDC to refect the Nexys 4 DDR to get Hamsters code working. The answer to 4) is that I believe you are connecting it correctly but would need a picture attached. 

cheers,

Jon

Edit: Vdd and Vcc are functionally the same. Its a difference in naming convention.

[deltaepsilon3]

Hi @jpeyron

Thanks for the example Hamsters code! I replaced my code with the example code, and I am getting good voltage readings now.

One question though, Vdd is by default 3.3V for the Nexys 4 DDR board, so the ADC only reads in voltage between 0 and 3.3V. Is there a way to modify something to make the ADC read in voltages in the range 0 to 5V?

[D@n]

@deltaepsilon3,

How about a voltage divider?  If you connect the voltage you want to read through two resistors to ground, then the voltage in the middle will be half what it was originally.  Hence a 0-5V input will become 0-2.5V, and ... you'll be good, right?

Dan