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RichardV

xspi_intr_example.c Example in Vivado

Question

Hello. I am trying to use one of the imported examples (xspi_intr_example.c) from within SDK (found link in system.mss in SDK). I want to use this "interrupt" example (I presume "intr" means "interrupt") to figure out how to use interrupts with MicroBlaze and SDK.

 

No Interrupt Port Externals

When I imported it, I got a compiler error regarding a missing header file: #include "xscugic.h". I found a copy of this file, and others linked to it (.c and .h files). Multiple copies with different versions are shown. I don't know which one to pick so I chose the set of files with the highest revision value shown.

However, when I manually enter this file it created more errors regarding missing files and undefined constants. I tried manually adding them in, but they created more of this problem.

It seems to me that I'm doing this incorrectly. This code was automatically generated, so I believe it messed up because my older Bitstream didn't have an "Interrupt" port setup (hence No Interrupt Port). I believe that we should never have to manually add these driver files; is this correct?

 

Added Interrupt Port Externals

So now I've I added "external" ports to the Interrupt signals on the MicroBlaze, but I honestly don't know what I'm doing here (please see attached). It validates ok, so I tried to generate a bitstream, but it failed. Below are the first 2 error messages. I do not understand the fine details of these messages, but it appears related to these Interrupt port externals that I just added. The error message indicates to alter the contents of a "tcl" file, which I find difficult without proper documentation showing how.

This design synthesized fine before these editions, so this error is limited to the interrupt pin I want to add.

 

Constraint File

I do not have the interrupt pin setup in my constraint file, so I think this is part of the problem (possibly the cause of the problem itself). Can someone shown me a sample Constraint file for an interrupt pin?

 

Interrupt Setup Example/Instructions in Vivado

Could someone please point out how to setup an interrupt within Vivado so that I can get this "xspi_intr_example.c" code working? I am not sure what Vivado wants to make the Interrupt work.

 

Thank you, Richard V

 

Vivado Error messages (with Interrupt ports as shown in PDF):

ERROR: [DRC 23-20] Rule violation (NSTD-1) Unspecified I/O Standard - 3 out of 52 logical ports use I/O standard (IOSTANDARD) value 'DEFAULT', instead of a user assigned specific value. This may cause I/O contention or incompatibility with the board power or connectivity affecting performance, signal integrity or in extreme cases cause damage to the device or the components to which it is connected. To correct this violation, specify all I/O standards. This design will fail to generate a bitstream unless all logical ports have a user specified I/O standard value defined. To allow bitstream creation with unspecified I/O standard values (not recommended), use this command: set_property SEVERITY {Warning} [get_drc_checks NSTD-1].  NOTE: When using the Vivado Runs infrastructure (e.g. launch_runs Tcl command), add this command to a .tcl file and add that file as a pre-hook for write_bitstream step for the implementation run. Problem ports: Interrupt_Ack_1[0:1], Interrupt_1.

ERROR: [DRC 23-20] Rule violation (UCIO-1) Unconstrained Logical Port - 3 out of 52 logical ports have no user assigned specific location constraint (LOC). This may cause I/O contention or incompatibility with the board power or connectivity affecting performance, signal integrity or in extreme cases cause damage to the device or the components to which it is connected. To correct this violation, specify all pin locations. This design will fail to generate a bitstream unless all logical ports have a user specified site LOC constraint defined.  To allow bitstream creation with unspecified pin locations (not recommended), use this command: set_property SEVERITY {Warning} [get_drc_checks UCIO-1].  NOTE: When using the Vivado Runs infrastructure (e.g. launch_runs Tcl command), add this command to a .tcl file and add that file as a pre-hook for write_bitstream step for the implementation run.  Problem ports: Interrupt_Ack_1[0:1], Interrupt_1.

design_spi_oled.pdf

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4 answers to this question

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Posted (edited)

Hi @RichardV,

Here is a forum thread using the PmodSF3 that uses interrupts. I attached a screen shot of their block design as well the code they ended up adapting from our IP core. We have not yet had time to update/fix our code so I would suggest to refer to the code I attached. I believe when you are configuring the microblaze processor do not select interrrupt. Afterward add the concat and axi interrupt controller blocks. I believe the only change you need to do is double click into the concat block and select number of ports as one.

cheers,

Jon

SPI_INTERRUPTS.jpg

PmodSF3 (1).c

PmodSF3 (1).h

main (4).txt

Edited by jpeyron
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Posted (edited)

Hello Jon. This is excellent! I just have one question regarding the block diagram:

I see this Concat IP connects to the SPI interrupt. I presume "Concat" mean concatenate. If correct, I can see why it is needed for multiple interrupts. However, why is it needed for a single interrupt, like you have shown?

Thank you Jon.

Edited by RichardV
edited for clarity

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Hello again. I tried something different. I wanted to focus on that example that is imported, as I originally started. I fixed my block diagram, but did something different because I'm not using the PMOD IP. I added an input port vector [0:0], configured as an interrupt. I also added this line for the interrupt pin in my constraint file:

set_property -dict { PACKAGE_PIN K18   IOSTANDARD LVCMOS33 } [get_ports { Interrupt_1[0]      }];   #IRQ  This is my interrupt pin.

I also set it up to interrupt on the falling edge. The Bitstream generated with no problems. Moving into SDK.

I imported the example "xspi_intr_example". I still got errors, but I was able to fix them with BOGUS data. I don't know what the real values should be. I have included the file, but here are the two lines and the locations:

Location in code: First line after Constant Definitions

#define XPAR_INTC_0_SPI_0_VEC_ID 1        // RRV: I forced this.

Location in code: First line in main()

 XIntc IntcInstance;        // RRV: I forced this

I added these lines manually to make this code compile. I see that I'm missing an IntC.

Interrupt_Pin.pdf

xspi_intr_example.c

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Hi @RichardV,

I have not found any useful input for your issue. Hopefully a more experienced community member will have some input for you. You might want to reach out to Xilinx support here about their example and IP.

cheers,

Jon 

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