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Sophia_123

How to constraint the XADC to external pins

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Hi,

I am using XADC on Zybo board in PL.an external valtage in 0~1v is used. A simulation on the XADC is successful to be done,the results of transformation are correct. However, when I connect a external power to the pin, the result as showed on LEDs is wrong and the drdy is always zero .Is it the constraint wrong?

My constraint is as follows.

the pin2 as vauxp7 is connected to external power.

the pin8 as vauxn0 is connected to GND.

thanks for help!

Sophia.

捕获.GIF

捕获1.GIF

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Hi @jpeyron

I have read the forum, but don't solve my problem, the simulation well done now, the constraint file is as follows.

And I connect a 0~1v voltage to auxp7, but  auxn7,vn,vp are connected to ground.

I only used the aux7. The settings of XADC are:

 Independent ADC Mode;

Continuous mode;

sequencer mode is off;

channel averaging is 16;

enable external mux is false;

 

 

ZYBO_Master.xdc

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Hi @Sophia_123,

Could you attached your hdl or your project(compressed). I posted a link to our project above. I attached our hdl and xdc from that project for reference. I have attached the settings of the xadc wizard as well. Here is a basic tutorial to this demo that has a picture of how we connected the pins. Here is another forum thread discussing the xadc for the zybo. I just went through the demo in vivado 2016.4 and was able to get the leds to light up and change based on the voltage i was giving it. Also remember input needs to be between 0-1v.  

cheers,

Jon

ZYBO_Master.xdc

XADCdemo.v

zybo_xdc_1.jpg

zybo_xdc_2.jpg

zybo_xdc_3.jpg

zybo_xdc_4.jpg

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@jpeyron

Hi, I conduct the demo project the "Zybo XADC Demo" you attached, and the circuit is as follows,my project attached follows, when I switch up , the led bright but don't change.

when I load the program into the board ,there is a problem:

[Common 17-48] File not found: E:/fpga_test/ad_testpl_2_board/test/test.runs/impl_1/debug_nets.ltx

best whishes!

sophia

 

捕获.PNG

XADC.v

ZYBO_Master.xdc

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Hi @Sophia_123,

Here is a xilinx forum question dealing with issues with debug_net.ltx. I did a compare between the xadc-demo for the zybo made for Vivado 2016.4 here and the code you provide above. You have made changes to the demo. I just ran the unchanged demo with no issue in Vivado 2016.4. I have attached a screen shot of waveforms as well as pictures of the zybo and Analog Discovery 2.  Have you been able to run the original demo in VIvado 2016.4?

cheers,

Jon

Zybo_xadc_1.jpg

Zybo_xadc_2.jpg

pictures.zip

Edited by jpeyron

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@jpeyron

Hi, I have successfully got the data transferred. Thank you very much for your help! However could you  tell me what function of the vivado you have used to produced the waveform the above pictures you attached?

best wishes!

Sophia

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Hi @Sophia_123,

Glad to hear you got this working! I am sorry for not clarifying the screen shots more. These are screens shots from a separate program that runs most of our usb multi-function instruments like the Analog Discovery 2 (here). I was using a waveform generator to make different DC voltages in between 0 and 1V.

cheers,

Jon

 

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