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how can i input data bytes in Bram in verilog


Rlohan

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@Rlohan,

You might wish to take a look at how xilinx structures its block RAM.  The hardware can only support some interfaces, not all.  Multiple writes at the same time is one of those interfaces the hardware doesn't support.

If you structure your block RAM resources well, though, you might manage to be creative and build multiple block RAMs that can all be written at the same time, but still act as a single block RAM unit within your design.  How you do this, though, would be dependent upon what you are trying to do so ... without more information (why you wish to write to many at once, what your timing constraints are, etc.), I'm not sure what more I might suggest.

Dan

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Let me add a few posibilities to the D@n's post.

1. It is possible to create BRAM with the data width up to 1024 bits. This would let you to write 128 bytes simultaneously. In my experience I used 128 bit wide (16 bytes) and 4096 deep. Also you can find Xilinx HDL templates for BRAM inside the Vivado HDL editor by clicking on the light bulb icon.

2. It is possible to accomplish the same goal by using bit arrays, let say 80 bit long. It seems to be simpler because it requires less HDL code but the choice depends on the architecture of your project.

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