Arty-Z7 GPIO0 access

[dbkincaid]

Hello, I am having trouble with the last bit of my project where I have modified the video_demo of the Arty_Z7 example

I added a 32bit GPIO to the Zynq7 in Vivado and exported it to the SDK.  Note I am 'not' using the AXI, I am using the direct GPIO access.  The .bit is automated from the block design.

I have read and re-read the example in SDK for initiating a port read for this XGPIOPS

Here is the code I think has an issue:

(at define block and globals)
	#define GPIO_DEVICE_ID  	XPAR_XGPIOPS_0_DEVICE_ID
	XGpioPs Gpio;	/* The driver instance for GPIO Device. */
(at beginning of function)
	XGpioPs_Config *ConfigPtr;
	u32 InputData;
(later where the code is executed)
	/* Initialize the GPIO driver. */
		ConfigPtr = XGpioPs_LookupConfig(GPIO_DEVICE_ID);
		status = XGpioPs_CfgInitialize(&Gpio,ConfigPtr,ConfigPtr->BaseAddr);
    /* Set the direction for all 32 pins to be input. */
    	XGpioPs_SetDirection(&Gpio, 0,0);
    /* Read the state of the data so that it can be verified, press any key to stop */
        while (!XUartPs_IsReceiveData(UART_BASEADDR))
        {
        	InputData = XGpioPs_Read(&Gpio, 0);
            xil_printf("%08x\n\r",InputData);
        };

What this is supposed to do is blast the UART with the GPIO_0 data coming from the fabric, I confirmed on the Vivado side using ILA that the GPIO_0 data is running counters, etc as I designed it.  What I actually get from the .ELF run is a constant value.  I think this means I am either reading from the wrong place or I am somehow misunderstanding the function and just repeating the 32bit address of the memory location (instead of the data)

Can anyone look this over and point out my error?

[elodg]

Read the GPIO section of ug585. The XGpioPs driver maps MIO and EMIO into different GPIO banks and uses sequential designators mixing the two. You most probably should not be reading bank 0 or pin 0.

[dbkincaid]

Ah, thanks for the hint!  The GPIO I put together ended up on EMIO 31:0 which mapped to XGpioPS 2 (not GPIO_0 as the Zynq7 indicated).

Once I changed the two lines that referenced the port it works!