So, I am starting to get these errors during the Place & Route phase
WARNING:Par:288 - The signal kbd<0>_IBUF has no load. PAR will not attempt to route this signal.
WARNING:Par:288 - The signal kbd<1>_IBUF has no load. PAR will not attempt to route this signal.
WARNING:Par:288 - The signal kbd<2>_IBUF has no load. PAR will not attempt to route this signal.
WARNING:Par:288 - The signal kbd<3>_IBUF has no load. PAR will not attempt to route this signal.
WARNING:Par:288 - The signal kbd<4>_IBUF has no load. PAR will not attempt to route this signal.
WARNING:Par:288 - The signal kbd<5>_IBUF has no load. PAR will not attempt to route this signal.
WARNING:Par:288 - The signal kbd<6>_IBUF has no load. PAR will not attempt to route this signal.
it only started when I added the enb register. It really makes no sense.
254: begin // line 0
trig = 0;
enb = 0;
// kbdphase = 1;
end
253: begin // line 1
trig = 0;
enb =0;
end
251: begin // line 2
trig = 0;
enb =0;
end
247: begin // line 3
trig = 0;
enb =0;
end
239: begin // line 4
trig = 0;
enb =0;
end
223: begin // line 5
trig = 0;
enb =0;
end
191: begin // line 6
trig = 0;
enb = 1;
end
127: begin // line 7
if (enb)
begin
trig = 1;
enb = 0;
end
else
begin
enb = 0;
trig = 0;
end
end
default
begin
enb = 0;
trig = 0;
end
endcase;
end
endmodule
The idea behind this is that the C64's Keyboard has 8 Column lines that get strobed individually. The row lines will return the keys that are pressed on that column (not implemented). Right now it just throws a line (TRIG) when a line goes high. The problem is that the line 7 does not behave like exactly like the others. It can actually go low for other reasons but never after line 6. So I thought to put up an enable pin to be turned on during line 6 period and then this will let line 7 know it can do its job and it can set the enable register go low again.
Anyways, the ISE is giving me a terrible time.
Also I can't understand why it requires me to set the enb line low on practically every single part of the case statement... otherwise I get it complaining about a possible latch.
Question
FlyMario
So, I am starting to get these errors during the Place & Route phase
WARNING:Par:288 - The signal kbd<0>_IBUF has no load. PAR will not attempt to route this signal.
WARNING:Par:288 - The signal kbd<1>_IBUF has no load. PAR will not attempt to route this signal.
WARNING:Par:288 - The signal kbd<2>_IBUF has no load. PAR will not attempt to route this signal.
WARNING:Par:288 - The signal kbd<3>_IBUF has no load. PAR will not attempt to route this signal.
WARNING:Par:288 - The signal kbd<4>_IBUF has no load. PAR will not attempt to route this signal.
WARNING:Par:288 - The signal kbd<5>_IBUF has no load. PAR will not attempt to route this signal.
WARNING:Par:288 - The signal kbd<6>_IBUF has no load. PAR will not attempt to route this signal.
it only started when I added the enb register. It really makes no sense.
`timescale 1ns / 1ps
module Trigger(trig,trigb,kbd);
output trig;
output trigb;
input[7:0] kbd;
reg trigb;
reg trig;
reg enb;
always
begin
trigb = kbd[7];
end
always @*
begin
case(kbd)
0: begin
enb = 0;
trig = 0;
end
254: begin // line 0
trig = 0;
enb = 0;
// kbdphase = 1;
end
253: begin // line 1
trig = 0;
enb =0;
end
251: begin // line 2
trig = 0;
enb =0;
end
247: begin // line 3
trig = 0;
enb =0;
end
239: begin // line 4
trig = 0;
enb =0;
end
223: begin // line 5
trig = 0;
enb =0;
end
191: begin // line 6
trig = 0;
enb = 1;
end
127: begin // line 7
if (enb)
begin
trig = 1;
enb = 0;
end
else
begin
enb = 0;
trig = 0;
end
end
default
begin
enb = 0;
trig = 0;
end
endcase;
end
endmodule
The idea behind this is that the C64's Keyboard has 8 Column lines that get strobed individually. The row lines will return the keys that are pressed on that column (not implemented). Right now it just throws a line (TRIG) when a line goes high. The problem is that the line 7 does not behave like exactly like the others. It can actually go low for other reasons but never after line 6. So I thought to put up an enable pin to be turned on during line 6 period and then this will let line 7 know it can do its job and it can set the enable register go low again.
Anyways, the ISE is giving me a terrible time.
Also I can't understand why it requires me to set the enb line low on practically every single part of the case statement... otherwise I get it complaining about a possible latch.
Do you all notice anything I am doing wrong?
Thanks a lot for any help you can provide.
Link to comment
Share on other sites
8 answers to this question
Recommended Posts
Archived
This topic is now archived and is closed to further replies.