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PoorCollegeStudent

Not understanding LCD Display

Question

Hello Digilent community,

   I am currently taking my first digital electronics class and my final project is a calculator written in VHDL using a Basys3 board, 16-key keypad, and a 16x2 LCD display with parallel interface, all provided by Digilent. I took a look at the provided example code from the resource library and I just had some questions about how it works. Now, the example code declares a constant before any of the processes, and this constant is an array of std_logic_vectors so it holds a preloaded message "Hello From Digilent" with the necessary function sets and all that preceding the message. In my case, I have to have a way to display the inputs from the keypad on the display and also display the output on the 2nd line of the display. I have the main logic part of the calculator settled, I just want to know how I can direct these signals from the keypad and the output of the computational module (as in the sum, difference, product, etc.) to the LCD display. I have never played with a display before now and never used VHDL or any type of board like the Basys3 before this class, so I guess I'm still quite novice and don't understand a good part of what the example code is telling me. I do get that the state machine is just cycling through the values in the constant and waits for certain delays to pass through before transitioning between certain states.

Since the values on the display have to be updated live as the user inputs numbers from the keypad and also when there is a value computed, how can I shift from having a constant with a preloaded message to something that can update itself as needed? My idea was keep the idea of the array of std_logic_vectors but only have one value (rather than the 23 or 24 that are preloaded in the current example code) that will update with every key press. I'll have two of these, one for the inputs (to show the numbers and operations on the first line) and one for the output (to show on the second line). I'm thinking maybe I declare a variable within a process that will update and be sensitive to the key presses? 

Also, I tried looking around the reference manual and such but I could not find the function code for how to display information on the 2nd line; so far, stuff only displays on the first line. 

Sorry this is such a bulky post. I have had a lot of questions and my professor hasn't been around much. Also, part of this project is learning to interface with new components, so in my case the keypad and lcd display, and I'm not having much luck without any guidance unfortunately. Thank you for taking the time to read this!

P.S. Attached the example vhd file from Digilent here for easy access in case anyone wants to look!

PmodCLP.vhd

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Hello all,

2:24am update -- I have been able to debounce the keypad somewhat like maybe 85%. Sometimes the number repeats itself once because I guess the keypad itself is VERY jiggly and I'm already accounting for a 400 us bounce limit in my debouncer.. Otherwise, it seems to work fine. It stops after 4 digits and does not continue to display past that. New values can only display after pressing one of the operation buttons (i.e. +, -, *, square) or the equal button. I had to change the negative sign to the center button on the FPGA and a clear button to the right button on the FPGA. Having the "F" key on the keypad was creating very weird results that I did not want to deal with simply because I don't have the time right now given demos are due this Friday. Basically, by setting "F" to a negative sign, the sign would not even display with a press of the "F" key but rather when the first digit was a "2", "3", "6", or "7" (I can't remember since I fixed it since then but I'm pretty sure these were the keys if it even matters). I tried making the negative sign indicated by the three, rightmost LEDs on the Basys3 board and they also lit up with these key values INSTEAD of the designated "F" key. In the code I even made a signal that went high only when "1111" was output by the keypad signals, so I couldn't even see a way this would be the case. Very strange outcome, indeed.

Since assigning the negative sign button to the center button on the FPGA, this issue stopped (thank god) so I have at least concluded that the issue was with the keypad itself and perhaps some timing issues with the debouncer. However, due to the fact that the keys that actually output a negative sign don't really have a clear connection/correlation/relationship I have no clue as to why this error came about.

Thank you all for your help and advice thus far. Tomorrow (thursday), I will be port mapping all the components of the calculator together. I'm thinking of taking a load signal from one of the components and using that to assign a new LCD_CMDS signal that holds the calculated value and have an if-statement assign either of the LCD_CMDS signals to the JB port given the state of the load signal so the display shows the currently desired values (load = high for output, low for input). I'm thinking that if the output is currently being displayed on the LCD, then the press of any number key (i.e. 0 through 9) will reset the display to show the inputs again. As much as I am anxious to try this out, I think I'm at my limit for tonight (this morning).

 

Edited by PoorCollegeStudent
few spelling/grammar errors hehe

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I am now having some trouble. The inputs will display on the LCD but the output will not. I have testbenched every module and they work as expected. There might be something wrong with the keypad interface. I basically need it to only output once per press rather than continuously like it does now, and I have no way of doing this yet.

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22 minutes ago, hamster said:

To make a single-cycle pulse on 'x_rising_edge' when signal 'x' changes from '0' to '1':

signal x_last              : std_logic := '0';
signal x_rising_edge : std_logic := '0';

 

... inside a clocked process....

if x_last = '0' and x = '1' then
   x_rising_edge <= '1';
else
   x_rising_edge <= '0';
end if;
x_last <= x;

 

Oh right I remember this from an in-class exercise we had once. I'll try it out.

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@D@n would that example happen to be in Verilog? I'm not exactly familiar with the language, we've just been using VHDL in class. I'm guessing because I can't recognize a bunch of the syntax, like the @(posedge i_clk) and 1'b0 or !counter[20]. Seems like a very cool application though! Thank you!

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Also a question, will FPGAs act unreliably after being operated/plugged in for a long time (long as in 10+ hours at a time). My demo is today (Friday) and our project still doesn't work unfortunately. Without having touched anything, I came back from dinner to see that the display only seems to like the keys "2", "7", and "9", but perhaps that could be something to do with the keypad decoder. Might not get great marks on this project, but I had a good time on this discussion post. Thank you all for your time and contributions.

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Hello Digilent Community,

     I am now officially done with my term and I want to share what my experience was like, as per @D@n's question. I would like to attach our final report here (we got an 86 on it, so please understand that it won't be the rest report haha). It was quite rushed since my partner and I were travelling during the last few days before the turn in date and the code in the appendices are quite scuffed. Vivado won't print PDFs in color and I haven't figured out how to fix the sizing or formatting, which is really inconvenient because it looks bad and not easy to read. If anyone has any questions about the code or writing at all, please feel free to private message me or just respond on this forum by tagging me! The idea behind how we wanted it to work, what it actually became, the struggles we had, and our theory on why it did not work again are included in the report along with our VHDL files and some testbench images. If they end up being too small of pictures, just let me know and i can attach the original ones here so it's easier to see. Thank you all for your help and consideration; it means to the world to me now and it meant the world to me before while I was working on this project.

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