I'm a begginer in FPGA, designing a project with Xilinx LogiCORE FIR Compiler in a Digilent Cmod A7-35T board.
The filter has 256 sets of coefficients (256 interleaved channels). The problem is that the use of BRAMs exceeds the resources available in the device.
Is it possible to increase the BRAMs number with the cellular RAM available in the Cmod board?
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Reinaldo Götz
Hello!
I'm a begginer in FPGA, designing a project with Xilinx LogiCORE FIR Compiler in a Digilent Cmod A7-35T board.
The filter has 256 sets of coefficients (256 interleaved channels). The problem is that the use of BRAMs exceeds the resources available in the device.
Is it possible to increase the BRAMs number with the cellular RAM available in the Cmod board?
Thanks.
Reinaldo
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