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s223523

Zybo processing image

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Hi, 

I am developing a game on a Zybo board. I have already programmed the VGA and a NES controller in VHDL. Now I am facing the problem of implementing the game. I want to use level backward image and running sprite image of the characters of the game on them. My questions are: how can I store the images of the levels and the sprite sheet on the RAM? and how can I process those images for running the game?

Thank you

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Hi @s223523

There are two types of RAM on Zybo: DDR3 connected to ARM processors and BRAM (block RAM) located on PL (FPGA).

BRAM is the easiest for use from the HDL code. You can instantiate single or dual port BRAM and read/write from HDL code using very simple operations. Personally, I prefer to use block diagrams for instantiation and HDL code but it's a matter of choice. All of these are described in the Xilinx documentation. I am am very pleased with my expericence with BRAM. There are some limitations of BRAM; it is only 240 kB on Zybo and it requires tricky settings if you need to address other than 32 or 64 bit words. BRAM can be used by ARM processor the same way as DDR3. Be aware that most of Xilinx documentation related to BRAM is pre-Vivado period and needs some accommodations.

DDR3 is much larger but to my knowledge it requires more IP for utilization from PL side. Documentation is also available on Xilinx site. The fastest way of communication is CDMA where the FPGA is an AXI - DMA master. This way processor is not included in the read/write operations. 

If I would do a project like yours I would consider using Zybo processor. A number of things can be done easier / faster from the processor side because many hardware components are connected to it and a minimal C-code is required for using them.

Good luck!

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Thank you for your fast reply. Actually I wanted also to know how to store image inside the two memory, I made basic thing on both Vivado and ISE. I need to handle more then image file and read more then one of them simultaneously. How can I do it?

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@s223523

I am not sure that I fully understand your question. An image is a data set and as any data it can be saved in memory. RAM on Zybo can be used for writing and reading simultaneuosly with some precausions if you access the same data address. I believe that you can also create two independent dual port BRAM modules of smaller size and utilize these concurrently.

Practical information you can find on Xilinx site. There are various examples, find relevant and test experimentally.

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Yes well what I meant was how I actually save the data set of a .PNG file for example and then later how can I access it for using. I mean: I have a landscape and a person running, how I store the two image on the RAM or on the BRAM and how later I can take one of them or both and process them on the VGA?

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@s223523

I've done a few (less complex) VGA projects before, I don't have any exact examples online at the moment to send you to, but this would be my suggested route:

In Vivado, you can instantiate two of Xilinx's Block Memory Generator IP cores in your project and hdl code, set up as Single Port ROMs with a COE initialization files. You can then stream data out of these ROMs to look up specific pixels in your images, depending on where the screen pixel horizontal and vertical count is - the specific math will be nontrivial and depend on your game logic - and then use these pixel values to select specific colors to put out over the VGA connection. This all assumes that you have the COE files to plug into the BRAM, creating these files will likely require a script or program of some kind running on your PC to convert PNG images to the COE format. A simple example of the COE format showing a 4x4 checkerboard pattern with a 2 bit address and 4 bit data would be below:

memory_initialization_radix=16;
memory_initialization_vector
    5,A,
    5,A;

You might try finding a PNG python library, or something else you would be more familiar with for doing this conversion.

As for instantiating the Block Memory cores, you might be able to refer to how the charLib core is used in the Nexys Video XADC example project - created in verilog, but the fundamentals are similar enough in this case. To create your own IP from scratch, you would use the IP Catalog window in Vivado (located under the Project Manager tab) and search for "block memory generator". This will pop up a "Customize IP" window, in which you will likely want to change things to be a "Single Port ROM" with Port A width and depth of your choice, no primitives output register, "always enabled" port type, and to load an init file to be the COE that you would have previously generated. These settings changes from default will get you a Port A read latency of 1 clock cycle (giving you two clocks to compute the address, one to look up data, and one to compute color, if you are running the VGA controller at 100MHz and the VGA at 25) and only the addra, clka, and douta ports. You can click the plus on the BRAM_PORTA interface on the image at the left of the window to check all of the exact port names your instantiation will require.

Hope this helps,

Arthur

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Dear @s223523

If you are looking for a practical solution you need to define you problem clearly. So far it is so vague that I have trouble to understand what is a gap in your knowledge you want to fill.

It would be helpful to describe your level of profficiency in HDL design and implementation. To spare you from frustration it should be said that it is unreasonable to expect that professional HDL designer would have time to educate you if you at the beginning. Also typically people working in industry are restricted in what IP they can share because it was commercially developed.

However, you seems to be very motivated person and with small effort and help of search engine you can find most of answers for your questions online. Studying these answers you will get it fully understood and appreciated.

I like approach of using COE file to prepopulate BRAM with static images. I guess artvvb got better understanding of the game. Also I'd recommend to use Vivado and IP integrator

Good luck!

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