Jagbandhu

Help for developing memory read/write JTAG APPLICATION

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Hi,

I have a SanDisk controller having ARC700 and ARC 600 processors.

I am trying to develop an application using digilent libraries which can read and write controller memory using JTAG interface.
I am using Digilent JTAG HS2 cable.

 

I am getting 0s, when I try to read IDCODE of the processors. I am following the JTAG TAP controller state diagram(filling the proper instruction code in instruction register for ARC processor) for reading IDCODES. Also, getting 0s when I try to read memory location. 

Please let me know what I am doing wrong

 

TAP_controller_LOGIC.jpg

Edited by Jagbandhu

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Is this a two wire or 4-wire JTAG interface? My memory for the the 2-wire JTAG interface is a bit fuzzy as I haven't really worked with that since 2012. For now I will assume it's a 4-wire JTAG interface. If I recall correctly the Synopsys ARC cores properly implement the JTAG protocol and will automatically load the IDCODE instruction into the INSTRUCTION register whenever you pass through Test Logic Reset (TLR). Assuming that's the case, you can do the following to load the IDCODE instruction, get into Shift-DR, and read the first 32-bit IDCODE form the chain:

HIF     hif;
BYTE    rgbSetup[] = {0xaa, 0x22, 0x00};
BYTE    rgbTdo[4];
DWORD   jid;

DmgrOpen(&hif, szDevName); // szDevName likely = "JtagHs2"
DjtgEnable(hif);
DjtgPutTmsTdiBits(hif, rgbSetup, NULL, 9, fFalse); // pass through test logic reset and go to SHIFT-DR
DjtgGetTdoBits(hif, fFalse, fFalse, rgbTdo, 32, fFalse); // shift out the first 32-bit IDcode from the scan chain
jid = (rgbTdo[3]<<24) + (rgbTdo[2]<<16) + (rgbTdo[1]<<8) + rgbTdo[0];
// note: you may want to enter a loop where you continue to shift 32-bits of data while (( 0 != jid ) && ( 0xFFFFFFFF != jid ))

I don't remember all of the details but I know there are several extra steps for performing the same operation in 2-wire JTAG mode.

Thanks,
Michael

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