CmodS6 SPI confuguration

[Norbert Ciolti]

Hi, i am here with a few questions.I own a CmodS6, pmod Nav and pmod Bluetooth. I configurate the S6 with a microblaze mcs (the lowest brother of microblaze because of space in S6) and i want to create a SPI comunication to PmodNav but i dont know how, everything a tried doesn`t work . Also i found some libs. for nav but is still to big for fitting in S6. (Working in ISE Desing)

[D@n]

@Norbert Ciolti,

The S6 is a wonderful little board, if for no other reason than that it is so logic challenged making it difficult for you to place all the design you might wish to place into it.  I personally love the way it challenges you to figure out alternative means of doing things (such as above) to get a task done.  You can see my S6 project here if you'd like--it uses a ZipCPU instead of a microblaze.  There's even room within the logic to trade CPU performance for logic space on the device if you wish.  For example, you could dump the PWM logic, the divide routine, and have about 300LUTs to play with or so.  If that's not enough, you could switch from the double instruction fetch module to a single fetch module and drop the compressed instruction set to get perhaps another 150 LUTs more ...

But let's look at your project for now and not mine.  What options are available to you?

1. Perhaps the simplest/easiest option would be to connect the microblaze to a GPIO peripheral (not sure if this works with MicroBlaze MCS), and to toggle lines as you saw fit from the GPIO peripheral.  This would give you access to the PModNAV, but you would also lose the opportunity to get measurements in a very time-regular fashion.  This was how I controlled a 2-line LCD display from the S6 (GPIO peripheral to a ZipCPU, not MicroBlaze) with all of the above logic within it.
2. Look hard at any MicroBlaze configuration screens.  Remove any options you don't absolutely need.
3. You can scrub your design for any components you don't really need, or components that you can rewrite to use less logic.  (AXI is a *really* expensive bus logicwise, every consider Wishbone?)  I know recent scrubs of my own managed to massively reduce the logic used by the QSPI and UART controllers.  (The newer QSPI controller clocks the interface at ~80MHz, vice 40MHz from before, despite using less logic)
4. There are also other CPU's you can use other than microblaze, depending upon what you wish to accomplish.  For example, Xilinx offers a picoblaze CPU, and there are many other CPU's available on OpenCores.  Many of these are very cheap in terms of logic.  If you go this road, you might wish to start with a catalog of open source CPUs that you can sort based upon logic usage and toolset availability.

I guess the bottom line is this: Because the CMod S6 is so challenged logically (that's a good thing--it develops you), you may need to be both creative, and very aware of what's going on within the design.  Prioritize the logic you need.  Rewrite/rebuild whenever you can to get the size smaller.  One of the recent lessons I learned was that by rewriting the peripherals, I could get more room for more CPU features---but I think I mentioned this above already.

Hope this helps.  If not, feel free to write back with more specifics of what you are trying to do and how you are stuck,

Dan