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A UDP echo-server design uses on-board Ethernet port to create a data-link between FPGA board Nexys 4 DDR and MatLAB. Echo-server is capable of reception and transmission data packets using ARP and UDP/IP protocols.
MAC address of FPGA board: 00:18:3e:01:ff:71
IP4 address of FPGA board: 192.168.1.10
Port number of the board, used in the design, is 58210.
The echo-server will reply back to any data server, which uses correct IP4 address and Port number of the board. MAC address of the board is made discoverable for the data server via ARP protocol.
This echo-server design doesn't use any input or output FIFO's as elesticity buffers,both in- and outgoing data packets are parsed/assembled in parallel with Rx/Tx processes, which allows better resource utilisation at the price of, probably, more complex design architecture. 
Design is implemented in VHDL using ISE by Xilinx. Below there are the source files for the echo-server projects along with .m file to transmit/receive data using MatLAB. Figure "wireshark_capture" illustrates the data traffic between FPGA board and data server (MatLAB); Figure "TxRx_Error" compares transmitted data against the data received from the board.

 

 

UDP echo-server manual.7z

 

UDP echo-server.7z

Edited by Vonmuller

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Nice! The Ethernet hose is a great way to interconnect FPGA boards ( or a PC ) and with ARP packets you can use a switch to send data between specific nodes. Now, where's that udp_client.m code? ( You didn't expect a pat on the back without a request for more did you? )

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Vonmuller,

I'm not surprised that you're confused by that comment.

Once you leave the high-priced world of academic conditioning you're likely to find that the commercial MatLAB is out of reach fif you're just a working stiff. So, I didn't bother to look at the MatLAB code before posting my remark. I'd like to see the same project without requiring commercial MatLAB. Say, SCILAB or OCTAVE or PYTHON or... whatever. The easy part is sending data to an FPGA board using the Ethernet hose. A flexible UDP client is a bit more work. I sure could have worded that remark better.

 Perhaps I should have read through all of the project code before commenting... but you you got me so excited!

Don't take any of my comments as negative criticism. I've not "completed" many projects that upon reflection downstream didn't beg for more...

Thanks for you post.

PS archived project files are also NICE.....

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@zygot,

I'm glad you managed to explain yourself better this time and for the future make sure you adopt more polite tone, your condescension is not appreciated here. Also, note that making things yourself is always more beneficial than asking somebody to do something for you, especially if you don't know how to ask NICELY.

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A few more words about the project I shared here with Digilent.

The main purpose of it is to demonstrate implementation of Ethernet link between the PC and the Nexys 4 DDR board using VHDL. It is supposed to be a leg-up for the people who want to build their own Ethernet-based apps, but don't know where to start or have some difficulties with implementation. Working on this design, as a non-specialist in the PC communications' area, I found a few problems, partially related to  incomplete/incorrect information in datasheets, partially - to the absence of comprehensive design guides related to HDL implementation of RMII/ MII interfaces. In the future I'm planning to write and post here such design manual, but it'll take me some time to do a write-up, because I'm doing it in my downtime. 

For now, those people, who are interested in this design, can make use of the testbench file ("tb_eth_rxtx_arp_udp_ram.vhd") I uploaded at this thread, to discover the logic behind different design solutions themselves. Also feel free to ask me design related questions here, I'll do my best to answer them.

Edited by Vonmuller

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Vonmuller,

Regardless of what you read into my comments I am never condescending ( I'm just not smart enough to be looking down on anyone else... ); though often poor at communicating my thoughts. As I don't see in my comments what you apparently do I have to conclude that there is more going on than what I posted in the previous comments here. None of this matters because we're here to encourage ideas.

I tend to see work efforts for what they can be; mine included. It was my intention to be encouraging, not insulting. I wasn't asking for anything either but I do see where your project could go. Believe me, I do have some knowledge of the work involved and barriers to be overcome  in a project like this one.

A few years back I did a similar project. PHYNET is a framework for connecting any FPGA board with an Ethernet PHY into a network as a node. The inspiration was from an article that I read about data collection for a CERN project. Also, I use hardware from a number of FPGA vendors and was frustrated by the lack of a common communications interface on development boards. In PHYNET nodes can send data to other nodes or request data from them. A PC can act as a soft node. Like your effort PHYNET eschews MACs and hard/soft microprocessors and all of the headaches involved. I won't get into details as this thread is about your project not mine. But perhaps you can understand my perspective.

While I don't know what your objectives are for this project I do hope that you'll continue to develop it.

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@Vonmuller,

Personally, I find your post above challenging: You did something I've never done on an FPGA board, and I feel challenged to try it myself, that's a good thing, right?  I mean, you took a complex project (get networking to work on an FPGA), took a nibble off of it, and made good progress.  I think that's wonderful!

As for @zygot, ... you'll get to appreciate him over time.  @hamster at one time said this of him,

@zygot, you have a strange turn of phrase... passively aggressive and paternal at the same time, and with all the taste and nutrition of a fine Belgian chocolate. :)

He can be appreciated--just ignore his gruffness and pretend condescension and you'll find him quite encouraging.  :D

Dan

 

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A Belgian chocolate with red pepper, I guess :D

But anyway, @zygot, I'll take my hat off to you, as you PHYNET project is much more complex than what I tried to do here!

@D@n Thank you for your very much encouraging and kind words!

To be honest, I don't think this project will get any further development. Only in case if I have any problems with data transmission in the future, I'll add TCP/IP protocol to it, but so far everything works great, so I don't want to spend any more time fixing the thing, which works (this echo-server, in fact, has already taken me much longer than I expected).

In fact, this is only a small part of a bigger design challenge. I shared it here because I thought that many people might struggle with Ethernet controller implementation on FPGA board and it would be a good idea to help them to get started, but my main goal is to build an FPGA-based Digital Micromirror Device (DMD) controller for the optical microscopy project I'm doing at the moment. So, the Ethernet link is only a mean to bring the data to control DMD to FPGA board. The next step will be to understand how to drive DMD and implement this driver.

That is another reason why I want to use MatLAB on the PC's side. It can do a lot more than just making my life easier when I deal with data transmission. I can use it for code generation, which will be passed to FPGA and used to drive DMD later, data acquisition and signal processing are also can be done easily in MatLAB. So, even though MatLAB is not free in general, it's worth paying for, as it'll save me a lot of time and efforts at almost every stage of my project.

Thank you once again, guys, for your support, feedback and encouragement!

Edited by Vonmuller

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Vonmuller,

Thanks for project background information; sounds like an interesting endeavour. You are of course correct that there isn't a lot of help for people wanting to use the Ethernet PHY without the burden of MACs and stacks. So posting what you did, IS helpful to those starting the journey of discovery and at the very least may spark some ideas and creativity. To those who benefit I hope that they respond with a post of their own.  Even if you don't add to what you started someone might. You never know what might come from posts like this. I know that there are people who would be surprised to discover that they have have inspired me by releasing snapshots of their work to the public.

Now, all of that talk of chocolate has made me hungry... 

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As I promised, design manual for the UDP echo-server project is ready. I uploaded it under the first post in this thread.

Edited by Vonmuller

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Vonmuller,

Thanks for your post and effort. I'm absolutely that you will have helped someone starting out in a similar endeavour... or just interested in Ethernet communication,

regards

 

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